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From: Bjorn Helgaas <helgaas@kernel.org>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: "Krishna chaitanya chundru" <quic_krichai@quicinc.com>,
	cros-qcom-dts-watchers@chromium.org,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Konrad Dybcio" <konradybcio@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Jingoo Han" <jingoohan1@gmail.com>,
	"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	quic_vbadigan@quicinc.com, quic_ramkri@quicinc.com,
	quic_nitegupt@quicinc.com, quic_skananth@quicinc.com,
	quic_vpernami@quicinc.com, quic_mrana@quicinc.com,
	mmareddy@quicinc.com, linux-arm-msm@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH 1/3] arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature
Date: Thu, 5 Dec 2024 10:42:24 -0600	[thread overview]
Message-ID: <20241205164224.GA3053577@bhelgaas> (raw)
In-Reply-To: <ca10fa00-fa9f-4e37-a50a-813629f4a2b3@oss.qualcomm.com>

On Thu, Dec 05, 2024 at 05:11:25PM +0100, Konrad Dybcio wrote:
> On 16.11.2024 11:00 PM, Krishna chaitanya chundru wrote:
> > Increase the configuration size to 256MB as required by the ECAM feature.
> > And also move config space, DBI, ELBI, IATU to upper PCIe region and use
> > lower PCIe region entierly for BAR region.
> > 
> > Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> > 
> > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > index 3d8410683402..a7e3d3e9d034 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > @@ -2196,10 +2196,10 @@ wifi: wifi@17a10040 {
> >  		pcie1: pcie@1c08000 {
> >  			compatible = "qcom,pcie-sc7280";
> >  			reg = <0 0x01c08000 0 0x3000>,
> > -			      <0 0x40000000 0 0xf1d>,
> > -			      <0 0x40000f20 0 0xa8>,
> > -			      <0 0x40001000 0 0x1000>,
> > -			      <0 0x40100000 0 0x100000>;
> > +			      <4 0x00000000 0 0xf1d>,
> > +			      <4 0x00000f20 0 0xa8>,
> > +			      <4 0x10000000 0 0x1000>,
> > +			      <4 0x00000000 0 0x10000000>;
> 
> So this region is far bigger, any reason to use 256MiB specifically?

I assume this is because ECAM takes 1MB/bus, and pcie1 has
bus-range = <0x00 0xff>.  If one wanted a smaller ECAM area,
I assume one would limit bus-range to match.

Bjorn

  reply	other threads:[~2024-12-05 16:42 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-11-16 22:00 [PATCH 0/3] PCI: dwc: Add ECAM support with iATU configuration Krishna chaitanya chundru
2024-11-16 22:00 ` [PATCH 1/3] arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature Krishna chaitanya chundru
2024-12-02 15:06   ` Manivannan Sadhasivam
2024-12-04  1:58     ` Krishna Chaitanya Chundru
2024-12-05 16:11   ` Konrad Dybcio
2024-12-05 16:42     ` Bjorn Helgaas [this message]
2024-11-16 22:00 ` [PATCH 2/3] PCI: dwc: Add ECAM support with iATU configuration Krishna chaitanya chundru
2024-11-21 12:55   ` kernel test robot
2024-11-21 21:43   ` kernel test robot
2024-12-02 16:42   ` Manivannan Sadhasivam
2024-12-04  2:02     ` Krishna Chaitanya Chundru
2024-12-03 18:55   ` Bjorn Helgaas
2024-12-04  2:15     ` Krishna Chaitanya Chundru
2024-12-04 22:17       ` Bjorn Helgaas
2024-12-09  4:30         ` Krishna Chaitanya Chundru
2024-12-09 23:55           ` Bjorn Helgaas
2024-11-16 22:00 ` [PATCH 3/3] PCI: qcom: Enable ECAM feature based on config size Krishna chaitanya chundru
2024-12-02 16:53   ` Manivannan Sadhasivam
2024-12-04  2:18     ` Krishna Chaitanya Chundru
2024-12-03 18:59   ` Bjorn Helgaas
2024-12-04  2:26     ` Krishna Chaitanya Chundru
2024-12-04 22:40       ` Bjorn Helgaas
2024-12-09  4:39         ` Krishna Chaitanya Chundru

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