From: Bjorn Helgaas <helgaas@kernel.org>
To: Shradha Todi <shradha.t@samsung.com>
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org,
kw@linux.com, robh@kernel.org, bhelgaas@google.com,
jingoohan1@gmail.com, Jonathan.Cameron@huawei.com,
fan.ni@samsung.com, a.manzanares@samsung.com,
pankaj.dubey@samsung.com, quic_nitegupt@quicinc.com,
quic_krichai@quicinc.com, gost.dev@samsung.com
Subject: Re: [PATCH v4 1/2] PCI: dwc: Add support for vendor specific capability search
Date: Fri, 6 Dec 2024 10:13:14 -0600 [thread overview]
Message-ID: <20241206161314.GA3101322@bhelgaas> (raw)
In-Reply-To: <20241206074456.17401-2-shradha.t@samsung.com>
On Fri, Dec 06, 2024 at 01:14:55PM +0530, Shradha Todi wrote:
> Add vendor specific extended configuration space capability search API
> using struct dw_pcie pointer for DW controllers.
>
> Signed-off-by: Shradha Todi <shradha.t@samsung.com>
> ---
> drivers/pci/controller/dwc/pcie-designware.c | 16 ++++++++++++++++
> drivers/pci/controller/dwc/pcie-designware.h | 1 +
> 2 files changed, 17 insertions(+)
>
> diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
> index 6d6cbc8b5b2c..41230c5e4a53 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.c
> +++ b/drivers/pci/controller/dwc/pcie-designware.c
> @@ -277,6 +277,22 @@ static u16 dw_pcie_find_next_ext_capability(struct dw_pcie *pci, u16 start,
> return 0;
> }
>
> +u16 dw_pcie_find_vsec_capability(struct dw_pcie *pci, u8 vsec_cap)
To make sure that we find a VSEC ID that corresponds to the expected
vendor, I think this interface needs to be the same as
pci_find_vsec_capability(). In particular, it needs to take a "u16
vendor" and a "u16 vsec_cap".
(pci_find_vsec_capability() takes an "int cap", but I don't think
that's quite right).
> +{
> + u16 vsec = 0;
> + u32 header;
> +
> + while (vsec = dw_pcie_find_next_ext_capability(pci, vsec,
> + PCI_EXT_CAP_ID_VNDR)) {
> + header = dw_pcie_readl_dbi(pci, vsec + PCI_VNDR_HEADER);
> + if (PCI_VNDR_HEADER_ID(header) == vsec_cap)
> + return vsec;
> + }
> +
> + return 0;
> +}
> +EXPORT_SYMBOL_GPL(dw_pcie_find_vsec_capability);
> +
> u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap)
> {
> return dw_pcie_find_next_ext_capability(pci, 0, cap);
> diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h
> index 347ab74ac35a..98a057820bc7 100644
> --- a/drivers/pci/controller/dwc/pcie-designware.h
> +++ b/drivers/pci/controller/dwc/pcie-designware.h
> @@ -476,6 +476,7 @@ void dw_pcie_version_detect(struct dw_pcie *pci);
>
> u8 dw_pcie_find_capability(struct dw_pcie *pci, u8 cap);
> u16 dw_pcie_find_ext_capability(struct dw_pcie *pci, u8 cap);
> +u16 dw_pcie_find_vsec_capability(struct dw_pcie *pci, u8 vsec_cap);
>
> int dw_pcie_read(void __iomem *addr, int size, u32 *val);
> int dw_pcie_write(void __iomem *addr, int size, u32 val);
> --
> 2.17.1
>
next prev parent reply other threads:[~2024-12-06 16:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20241206074226epcas5p116df75209c19f95223761ba56d179a39@epcas5p1.samsung.com>
2024-12-06 7:44 ` [PATCH v4 0/2] Add support for RAS DES feature in PCIe DW Shradha Todi
2024-12-06 7:44 ` [PATCH v4 1/2] PCI: dwc: Add support for vendor specific capability search Shradha Todi
2024-12-06 12:02 ` kernel test robot
2024-12-06 12:57 ` kernel test robot
2024-12-06 16:13 ` Bjorn Helgaas [this message]
2024-12-11 11:45 ` Shradha Todi
2024-12-11 14:43 ` Bjorn Helgaas
2025-01-15 15:27 ` Manivannan Sadhasivam
2025-01-15 16:12 ` Bjorn Helgaas
2025-01-15 16:29 ` Manivannan Sadhasivam
2025-01-15 16:38 ` Bjorn Helgaas
2025-01-15 17:03 ` Shradha Todi
2025-01-16 7:12 ` Shradha Todi
2025-01-16 14:25 ` 'Manivannan Sadhasivam'
2024-12-06 7:44 ` [PATCH v4 2/2] PCI: dwc: Add debugfs based RASDES support in DWC Shradha Todi
2024-12-09 22:29 ` Fan Ni
2024-12-11 11:08 ` Shradha Todi
2025-01-15 16:55 ` Manivannan Sadhasivam
2025-01-07 12:21 ` Shradha Todi
2025-01-15 16:53 ` Manivannan Sadhasivam
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20241206161314.GA3101322@bhelgaas \
--to=helgaas@kernel.org \
--cc=Jonathan.Cameron@huawei.com \
--cc=a.manzanares@samsung.com \
--cc=bhelgaas@google.com \
--cc=fan.ni@samsung.com \
--cc=gost.dev@samsung.com \
--cc=jingoohan1@gmail.com \
--cc=kw@linux.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=pankaj.dubey@samsung.com \
--cc=quic_krichai@quicinc.com \
--cc=quic_nitegupt@quicinc.com \
--cc=robh@kernel.org \
--cc=shradha.t@samsung.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox