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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Jianjun Wang <jianjun.wang@mediatek.com>
Cc: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Ryder Lee" <ryder.lee@mediatek.com>,
	linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	"Xavier Chang" <Xavier.Chang@mediatek.com>
Subject: Re: [PATCH 5/5] PCI: mediatek-gen3: Keep PCIe power and clocks if suspend-to-idle
Date: Mon, 6 Jan 2025 21:53:52 +0530	[thread overview]
Message-ID: <20250106162352.neo5pkunbdakizar@thinkpad> (raw)
In-Reply-To: <20250103060035.30688-6-jianjun.wang@mediatek.com>

On Fri, Jan 03, 2025 at 02:00:15PM +0800, Jianjun Wang wrote:
> If the target system sleep state is suspend-to-idle, the bridge is
> supposed to stay in D0, and the framework will not help to restore its
> configuration space, so keep its power and clocks during suspend.
> 
> It's recommended to enable L1ss support, so the link can be changed to
> L1.2 state during suspend.
> 
> Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com>
> ---
>  drivers/pci/controller/pcie-mediatek-gen3.c | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
> 
> diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c
> index 48f83c2d91f7..11da68910502 100644
> --- a/drivers/pci/controller/pcie-mediatek-gen3.c
> +++ b/drivers/pci/controller/pcie-mediatek-gen3.c
> @@ -1291,6 +1291,19 @@ static int mtk_pcie_suspend_noirq(struct device *dev)
>  	int err;
>  	u32 val;
>  
> +	/*
> +	 * If the target system sleep state is suspend-to-idle, the bridge is supposed to stay in
> +	 * D0, and the framework will not help to restore its configuration space, so keep it's
> +	 * power and clocks during suspend.
> +	 *
> +	 * It's recommended to enable L1ss support, so the link can be changed to L1.2 state during
> +	 * suspend.
> +	 */
> +	if (pm_suspend_default_s2idle()) {

I think you need:

	if (pm_suspend_target_state == PM_SUSPEND_TO_IDLE) 

here and below.

> +		dev_info(dev, "System enter s2idle state, keep PCIe power and clocks\n");

There is absolutely no reason to print this message every time system suspend
happens. Even dev_dbg() seems unnecessary to me.

- Mani

> +		return 0;
> +	}
> +
>  	/* Trigger link to L2 state */
>  	err = mtk_pcie_turn_off_link(pcie);
>  	if (err) {
> @@ -1316,6 +1329,11 @@ static int mtk_pcie_resume_noirq(struct device *dev)
>  	struct mtk_gen3_pcie *pcie = dev_get_drvdata(dev);
>  	int err;
>  
> +	if (pm_suspend_default_s2idle()) {
> +		dev_info(dev, "System enter s2idle state, no need to reinitialization\n");
> +		return 0;
> +	}
> +
>  	err = pcie->soc->power_up(pcie);
>  	if (err)
>  		return err;
> -- 
> 2.46.0
> 

-- 
மணிவண்ணன் சதாசிவம்

      parent reply	other threads:[~2025-01-06 16:24 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-03  6:00 [PATCH 0/5] PCI: mediatek-gen3: Add MT8196 support Jianjun Wang
2025-01-03  6:00 ` [PATCH 1/5] dt-bindings: " Jianjun Wang
2025-01-03  9:10   ` Krzysztof Kozlowski
2025-01-06  9:26     ` Jianjun Wang (王建军)
2025-01-06 12:27       ` Krzysztof Kozlowski
2025-01-07  8:43         ` Jianjun Wang (王建军)
2025-01-07  9:02           ` Chen-Yu Tsai
2025-01-08  6:53             ` Jianjun Wang (王建军)
2025-01-08  7:16           ` Krzysztof Kozlowski
2025-01-08  7:30             ` Jianjun Wang (王建军)
2025-01-03  9:26   ` AngeloGioacchino Del Regno
2025-01-06  9:19     ` Jianjun Wang (王建军)
2025-01-07 13:04       ` AngeloGioacchino Del Regno
2025-01-08  7:24         ` Jianjun Wang (王建军)
2025-01-03  6:00 ` [PATCH 2/5] " Jianjun Wang
2025-01-03 19:02   ` Bjorn Helgaas
2025-01-07  1:51     ` Jianjun Wang (王建军)
2025-01-03  6:00 ` [PATCH 3/5] PCI: mediatek-gen3: Disable ASPM L0s Jianjun Wang
2025-01-03  9:16   ` AngeloGioacchino Del Regno
2025-01-07  2:18     ` Jianjun Wang (王建军)
2025-01-07 11:44       ` AngeloGioacchino Del Regno
2025-01-07 23:07         ` Bjorn Helgaas
2025-01-03 19:15   ` Bjorn Helgaas
2025-01-07  2:44     ` Jianjun Wang (王建军)
2025-01-07 23:06       ` Bjorn Helgaas
2025-01-06 16:09   ` Manivannan Sadhasivam
2025-01-03  6:00 ` [PATCH 4/5] PCI: mediatek-gen3: Don't reply AXI slave error Jianjun Wang
2025-01-03  9:29   ` AngeloGioacchino Del Regno
2025-01-06  9:27     ` Jianjun Wang (王建军)
2025-01-03 19:19   ` Bjorn Helgaas
2025-01-06  9:31     ` Jianjun Wang (王建军)
2025-01-06 16:16   ` Manivannan Sadhasivam
2025-01-07  3:21     ` Jianjun Wang (王建军)
2025-01-03  6:00 ` [PATCH 5/5] PCI: mediatek-gen3: Keep PCIe power and clocks if suspend-to-idle Jianjun Wang
2025-01-03  9:14   ` AngeloGioacchino Del Regno
2025-01-03 19:13   ` Bjorn Helgaas
2025-01-06 16:23   ` Manivannan Sadhasivam [this message]

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