From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 521C5EC4 for ; Thu, 16 Jan 2025 04:47:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.174 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737002856; cv=none; b=hvQt5hZzELAOT74Wn/fHW27JrXvlC7CseX8y66m2jYIfDmfjDersMU8G2UFAV7dakw4HuDp3BzciWmxKfU0Byp9IwK2zGwhmqimom65kq9VWssb5QiNHZbU97ZbxV+yZ1ssKRuJC+Fh/2avZEHTngxTvw0h4Yhk3QVl6lNaPOJs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1737002856; c=relaxed/simple; bh=LX6Kpof3GqQFlFOI2OjFz/Xlb/CA76NP/oUe2XWNbz4=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=FG0EC/1cHGtfiAWBbJNXSrmihD6gEF/vlAinscfePSmFWsz6FkVz0DF+c+0vkulrUMKFvAKAzr55VOHNraSI0Dg0Ye39/D4hRDyyEM79AdFg/5NiOzghUFXm7aSLgDqkY59uIIlfFUqL3Vq0EMvCVvCEHtLS1QydXjAqzX17+QA= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Rp9kWckM; arc=none smtp.client-ip=209.85.214.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Rp9kWckM" Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-2161eb95317so7488105ad.1 for ; Wed, 15 Jan 2025 20:47:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1737002855; x=1737607655; darn=vger.kernel.org; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date:from:to :cc:subject:date:message-id:reply-to; bh=V01nO0SZ37R+JBLX/uBesYNHFkKJgAfRsOpWZID4QTg=; b=Rp9kWckMO21zjCKeZ20RT0ABHl4/CQNKJQ2k3VnYGwBhVjLUD6seewsC5av6ORSgls fQo4mPWBqhwxn2jMpAMlfxMkeZby16GBrq7agYxNQfm4l2Q4LDGr2ldq5SUv9BMGESd1 /mBSvyWdI2gH5MA5flhZ46IbxFAdcAz3YJrbIvBeTqaUotIYt7hT8D+DLQvB6X2cbfvR vR1Bw7tKK7yBLeXpZY/ySUA2Ehr1A7Gm1id2rvgjU1G1PMO4jpOaVzp8N2vLA9YlOZdG PHCo/F3avssvx38FHTmmQcrYOPkpvkKpHfCrlmF96VbfQXBMHyGUajUUmH9KDrecugoB HVvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1737002855; x=1737607655; h=in-reply-to:content-transfer-encoding:content-disposition :mime-version:references:message-id:subject:cc:to:from:date :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=V01nO0SZ37R+JBLX/uBesYNHFkKJgAfRsOpWZID4QTg=; b=Dj/0pB9st5fp1OXXwtEtCooD2g7f9RNwpoS6tfUUa8/Y85yL2mdlyGLr38hdLm0J3d 6/TLomexKUukUeygC2pRjqEwZK61XA+P3KFKKfMmQbxU1+cjnO0vZ/UuiIaWisAXue+V UGGqp8BlWxFt1CPsf+ZRIuR+3FSPg8FJe9EmzyTJHASrSczou4zxmpsVQWJI6RZVqe4q x9x/BOoyYeQe/HO6F9VIgIvW9eAzi+rDWCkO76cQEX/U2YnUB4dNKaSHawIUOt4hhHzI YW+Lx/HEK1I9LlrYLF1k72I3AQElDopWhYKBZSWHauQ5sqM7XTHoOoK0TBJ1V/zRehOk h+9w== X-Forwarded-Encrypted: i=1; AJvYcCWyfUZoDRNAPeTexAh7eluNfStg/zYLUkgRWlAEKsey+aXoaUsHIt55xZSd+iB8RZJAqP7ZJZuqMqc=@vger.kernel.org X-Gm-Message-State: AOJu0YycGMj0gaUA/fseZmVTP6zuBa+DiilGufiCNmsDTLLURvneX8WS jyTH9b6oo8NN4RTopLBFai1UYUVoXr0BC9PA4numQKwu9AOThRVBUP6dTRuSUw== X-Gm-Gg: ASbGncv0j9CVu9cr0jpiF+DrDpJL/cFt62ldVin4IQmB0EJ5BMU7aqxlP0525s0k/mt E+SlEwmKnMDfIc/8oldnz/+65afUhyC1C2HU1feCd2Y6E0wSGksPHrCUVQd+9MrUs8wN2SAjiex fK3Q0oMIRsj29Cd/jCR0EAZ16S/EZnEUC/utY1fblHpHOVHQU50muet4d0sZ5BjOOru0BKBhtXh wrQsvRXyHbtYzAN16lvRGmXGe6OBXdrEx4T7VxzwFo5WgkTl8Ftb7bBEnoSN1JjvHc= X-Google-Smtp-Source: AGHT+IHwfbiGq5loLxwv4zEURJyYuoHb37VHX9d1McOu5eZZj9jVra5zahjjNYA5h9O2VRKhhlx4Rg== X-Received: by 2002:a05:6a00:392a:b0:725:b347:c3cc with SMTP id d2e1a72fcca58-72d2200273bmr45899486b3a.23.1737002854546; Wed, 15 Jan 2025 20:47:34 -0800 (PST) Received: from thinkpad ([120.60.139.68]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-72d405943c2sm9984852b3a.79.2025.01.15.20.47.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jan 2025 20:47:34 -0800 (PST) Date: Thu, 16 Jan 2025 10:17:25 +0530 From: Manivannan Sadhasivam To: Niklas Cassel Cc: Vinod Koul , kw@linux.com, gregkh@linuxfoundation.org, arnd@arndb.de, lpieralisi@kernel.org, shuah@kernel.org, kishon@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, bhelgaas@google.com, linux-arm-msm@vger.kernel.org, robh@kernel.org, linux-kselftest@vger.kernel.org, Aman Gupta , Padmanabhan Rajanbabu Subject: Re: [PATCH v4 3/3] selftests: pci_endpoint: Migrate to Kselftest framework Message-ID: <20250116044725.ooskvqlh2lpdr2xx@thinkpad> References: <20241231131341.39292-1-manivannan.sadhasivam@linaro.org> <20241231131341.39292-4-manivannan.sadhasivam@linaro.org> <20241231191812.ymyss2dh7naz4oda@thinkpad> <2C16240A-28F8-4D9B-9FD7-33E4E6F0879E@kernel.org> <20250102070404.aempesitsqktfnle@thinkpad> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Thu, Jan 02, 2025 at 03:23:14PM +0100, Niklas Cassel wrote: > Hello Mani, Vinod, > > On Thu, Jan 02, 2025 at 12:34:04PM +0530, Manivannan Sadhasivam wrote: > > On Tue, Dec 31, 2024 at 08:33:57PM +0100, Niklas Cassel wrote: > > > > > > I have some patches that adds DMA_MEMCPY to dw-edma, but I'm not sure if the DWC eDMA hardware supports having both src and dst as PCI addresses, or if only one of them can be a PCI address (with the other one being a local address). > > > > > > If only one of them can be a PCI address, then I'm not sure if your suggested patch is correct. > > > > > > > I don't see why that would be an issue. DMA_MEMCPY is independent of PCI/local > > addresses. If a dmaengine driver support doing MEMCPY, then the dma cap should > > be sufficient. As you said, if a controller supports both SLAVE and MEMCPY, the > > test currently errors out, which is wrong. > > While I am okay with your suggested change to pci-epf-test.c: > > >- if (epf_test->dma_private) { > > >+ if (!dma_has_cap(DMA_MEMCPY, epf_test->dma_chan_tx->device->cap_mask)) { > > Since this will ensure that a DMA driver implementing DMA_MEMCPY, > which cannot be shared (has DMA_PRIVATE set), will not error out. > > > What I'm trying to explain is that in: > https://lore.kernel.org/linux-pci/Z2BW4CjdE1p50AhC@vaman/ > https://lore.kernel.org/linux-pci/20241217090129.6dodrgi4tn7l3cod@thinkpad/ > > Vinod (any you) suggested that we should add support for prep_memcpy() > (which implies also setting cap DMA_MEMCPY) in the dw-edma DMA driver. > > However, from section "6.3 Using the DMA" in the DWC databook, > the DWC eDMA hardware only supports: > - Transfer (copy) of a block of data from local memory to remote memory. > - Transfer (copy) of a block of data from remote memory to local memory. > > > Currently, we have: > https://github.com/torvalds/linux/blob/v6.13-rc5/include/linux/dmaengine.h#L843-L844 > https://github.com/torvalds/linux/blob/v6.13-rc5/drivers/dma/dw-edma/dw-edma-core.c#L215-L231 > > Where we can expose per-channel capabilities, so we set MEM_TO_DEV/DEV_TO_MEM > per channel, however, these are returned in a struct dma_slave_caps *caps, > so this is AFAICT only for DMA_SLAVE, not for DMA_MEMCPY. > > Looking at: > https://github.com/torvalds/linux/blob/v6.13-rc5/include/linux/dmaengine.h#L975-L979 > it seems that DMA_MEMCPY is always assumed to be MEM_TO_MEM. > > To me, it seems that we would either need a new dma_transaction_type (e.g. DMA_COPY) > where we can set dir: > MEM_TO_DEV, DEV_TO_MEM, or DEV_TO_DEV. (dw-edma would not support DEV_TO_DEV.) > > Or, if we should stick with DMA_MEMCPY, we would need another way of telling > client drivers that only src or dst can be a remote address. > > Until this is solved, I think I will stop my work on adding DMA_MEMCPY to the > dw-edma driver. > I think your concern is regarding setting the DMA transfer direction for MEMCPY, right? And you are saying that even if we use tx/rx channels, currently we cannot set DEV_TO_DEV like directions? But I'm somewhat confused about what is blocking you from adding MEMCPY support to the dw-edma driver since that driver cannot support DEV_TO_DEV. In your WIP driver, you were setting the direction based on the channel. Isn't that sufficient enough? - Mani -- மணிவண்ணன் சதாசிவம்