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From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
To: Niklas Cassel <cassel@kernel.org>
Cc: "Jingoo Han" <jingoohan1@gmail.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kw@linux.com>,
	"Rob Herring" <robh@kernel.org>,
	"Bjorn Helgaas" <bhelgaas@google.com>,
	"Damien Le Moal" <dlemoal@kernel.org>,
	"Siddharth Vadapalli" <s-vadapalli@ti.com>,
	"Udit Kumar" <u-kumar1@ti.com>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH v3 2/6] PCI: dwc: ep: Move dw_pcie_ep_find_ext_capability()
Date: Sun, 19 Jan 2025 10:45:38 +0530	[thread overview]
Message-ID: <20250119051538.mqss2plmf7oh65d2@thinkpad> (raw)
In-Reply-To: <20250113102730.1700963-10-cassel@kernel.org>

On Mon, Jan 13, 2025 at 11:27:33AM +0100, Niklas Cassel wrote:
> Move dw_pcie_ep_find_ext_capability() so that it is located next to
> dw_pcie_ep_find_capability().
> 
> Additionally, a follow-up commit requires this to be defined earlier
> in order to avoid a forward declaration.
> 
> Signed-off-by: Niklas Cassel <cassel@kernel.org>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

- Mani

> ---
>  .../pci/controller/dwc/pcie-designware-ep.c   | 36 +++++++++----------
>  1 file changed, 18 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c
> index 8e07d432e74f..6b494781da42 100644
> --- a/drivers/pci/controller/dwc/pcie-designware-ep.c
> +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c
> @@ -102,6 +102,24 @@ static u8 dw_pcie_ep_find_capability(struct dw_pcie_ep *ep, u8 func_no, u8 cap)
>  	return __dw_pcie_ep_find_next_cap(ep, func_no, next_cap_ptr, cap);
>  }
>  
> +static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap)
> +{
> +	u32 header;
> +	int pos = PCI_CFG_SPACE_SIZE;
> +
> +	while (pos) {
> +		header = dw_pcie_readl_dbi(pci, pos);
> +		if (PCI_EXT_CAP_ID(header) == cap)
> +			return pos;
> +
> +		pos = PCI_EXT_CAP_NEXT(header);
> +		if (!pos)
> +			break;
> +	}
> +
> +	return 0;
> +}
> +
>  static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
>  				   struct pci_epf_header *hdr)
>  {
> @@ -690,24 +708,6 @@ void dw_pcie_ep_deinit(struct dw_pcie_ep *ep)
>  }
>  EXPORT_SYMBOL_GPL(dw_pcie_ep_deinit);
>  
> -static unsigned int dw_pcie_ep_find_ext_capability(struct dw_pcie *pci, int cap)
> -{
> -	u32 header;
> -	int pos = PCI_CFG_SPACE_SIZE;
> -
> -	while (pos) {
> -		header = dw_pcie_readl_dbi(pci, pos);
> -		if (PCI_EXT_CAP_ID(header) == cap)
> -			return pos;
> -
> -		pos = PCI_EXT_CAP_NEXT(header);
> -		if (!pos)
> -			break;
> -	}
> -
> -	return 0;
> -}
> -
>  static void dw_pcie_ep_init_non_sticky_registers(struct dw_pcie *pci)
>  {
>  	unsigned int offset;
> -- 
> 2.47.1
> 

-- 
மணிவண்ணன் சதாசிவம்

  reply	other threads:[~2025-01-19  5:15 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-13 10:27 [PATCH v3 0/6] PCI: endpoint: Add support for resizable BARs Niklas Cassel
2025-01-13 10:27 ` [PATCH v3 1/6] PCI: endpoint: Add BAR type BAR_RESIZABLE Niklas Cassel
2025-01-19  5:14   ` Manivannan Sadhasivam
2025-01-13 10:27 ` [PATCH v3 2/6] PCI: dwc: ep: Move dw_pcie_ep_find_ext_capability() Niklas Cassel
2025-01-19  5:15   ` Manivannan Sadhasivam [this message]
2025-01-13 10:27 ` [PATCH v3 3/6] PCI: dwc: endpoint: Add support for BAR type BAR_RESIZABLE Niklas Cassel
2025-01-19  5:29   ` Manivannan Sadhasivam
2025-01-13 10:27 ` [PATCH v3 4/6] PCI: keystone: Describe resizable BARs as resizable BARs Niklas Cassel
2025-01-19  5:31   ` Manivannan Sadhasivam
2025-01-13 10:27 ` [PATCH v3 5/6] PCI: keystone: Specify correct alignment requirement Niklas Cassel
2025-01-19  5:32   ` Manivannan Sadhasivam
2025-01-13 10:27 ` [PATCH v3 6/6] PCI: dw-rockchip: Describe resizable BARs as resizable BARs Niklas Cassel
2025-01-19  5:33   ` Manivannan Sadhasivam
2025-01-19  5:08 ` [PATCH v3 0/6] PCI: endpoint: Add support for " Manivannan Sadhasivam

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