From: Bjorn Helgaas <helgaas@kernel.org>
To: Jacky Chou <jacky_chou@aspeedtech.com>
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BMC-SW <BMC-SW@aspeedtech.com>
Subject: Re: 回覆: 回覆: [PATCH 5/7] ARM: dts: aspeed-g6: Add PCIe RC node
Date: Wed, 25 Jun 2025 17:16:53 -0500 [thread overview]
Message-ID: <20250625221653.GA1590146@bhelgaas> (raw)
In-Reply-To: <SEYPR06MB51346BC9292066243CB845699D7BA@SEYPR06MB5134.apcprd06.prod.outlook.com>
On Wed, Jun 25, 2025 at 08:27:26AM +0000, Jacky Chou wrote:
> > > > > + resets = <&syscon ASPEED_RESET_H2X>,
> > > > > + <&syscon ASPEED_RESET_PCIE_RC_O>;
> > > > > + reset-names = "h2x", "perst";
> > > >
> > > > PERST# is clearly a per-Root Port item since it's a signal on the
> > > > PCIe connector. Can you separate this and any other per-Root Port
> > > > things into a Root Port stanza to leave open the possibility of
> > > > future hardware that supports multiple Root Ports in the RC?
> > >
> > > The PCIe RC that designed by us is only one root port.
> >
> > Yes. But this driver may be used in the future for other RCs that include more
> > than one Root Port, and it would be good if that didn't require structural
> > changes to the DT. Also, there are RCs from other vendors that include more
> > than one Root Port, and I'd like all the DTs and drivers to have similar
> > structure.
>
> Thanks.
> Is the "pciec" node in arch/arm/boot/dts/marvell/armada-385.dtsi
> what you said? Or could you provide some examples for us to modify
> our pcie rc node?
Here are some examples of DT bindings and corresponding driver code:
* drivers/pci/controller/dwc/pcie-kirin.c
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pci/hisilicon,kirin-pcie.yaml?id=v6.16-rc1#n108
kirin_pcie_parse_port():
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/dwc/pcie-kirin.c?id=v6.16-rc1#n399
* drivers/pci/controller/pci-mvebu.c
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pci/marvell,kirkwood-pcie.yaml?id=v6.16-rc1#n125
mvebu_pcie_parse_port():
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pci-mvebu.c?id=v6.16-rc1#n1252
* drivers/pci/controller/pcie-mt7621.c
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pci/mediatek,mt7621-pcie.yaml?id=v6.16-rc1#n111
mt7621_pcie_parse_port():
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pcie-mt7621.c.c?id=v6.16-rc1#n198
* drivers/pci/controller/pcie-mediatek.c
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/pci/mediatek-pcie.txt?id=v6.16-rc1#n85
mtk_pcie_parse_port():
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pcie-mediatek.c.c?id=v6.16-rc1#n909
next prev parent reply other threads:[~2025-06-25 22:16 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-13 3:29 [PATCH 0/7] Add ASPEED PCIe Root Complex support Jacky Chou
2025-06-13 3:29 ` [PATCH 1/7] dt-bindings: phy: Add document for ASPEED PCIe PHY Jacky Chou
2025-06-13 9:14 ` neil.armstrong
2025-06-20 5:03 ` 回覆: " Jacky Chou
2025-06-13 9:44 ` Krzysztof Kozlowski
2025-06-20 8:29 ` 回覆: " Jacky Chou
2025-06-13 3:29 ` [PATCH 2/7] dt-bindings: pci: Add document for ASPEED PCIe Config Jacky Chou
2025-06-13 9:46 ` Krzysztof Kozlowski
2025-06-20 8:32 ` 回覆: " Jacky Chou
2025-06-13 15:58 ` Bjorn Helgaas
2025-06-20 5:27 ` Jacky Chou
2025-06-13 3:29 ` [PATCH 3/7] dt-bindings: pci: Add document for ASPEED PCIe RC Jacky Chou
2025-06-13 9:50 ` Krzysztof Kozlowski
2025-06-20 8:36 ` Jacky Chou
2025-06-25 21:04 ` Rob Herring
2025-06-27 9:59 ` 回覆: " Jacky Chou
2025-06-13 3:29 ` [PATCH 4/7] ARM: dts: aspeed-g6: Add AST2600 PCIe RC PERST ctrl pin Jacky Chou
2025-06-13 9:51 ` Krzysztof Kozlowski
2025-06-20 8:36 ` Jacky Chou
2025-06-13 15:59 ` Bjorn Helgaas
2025-06-13 3:29 ` [PATCH 5/7] ARM: dts: aspeed-g6: Add PCIe RC node Jacky Chou
2025-06-13 15:54 ` Bjorn Helgaas
2025-06-20 5:24 ` 回覆: " Jacky Chou
2025-06-24 15:28 ` Bjorn Helgaas
2025-06-25 8:27 ` 回覆: " Jacky Chou
2025-06-25 22:16 ` Bjorn Helgaas [this message]
2025-06-27 10:02 ` Jacky Chou
2025-06-13 3:30 ` [PATCH 6/7] pinctrl: aspeed-g6: Add PCIe RC PERST pin group Jacky Chou
2025-06-18 12:15 ` Linus Walleij
2025-06-20 7:09 ` Andrew Jeffery
2025-06-13 3:30 ` [PATCH 7/7] pci: aspeed: Add ASPEED PCIe host controller driver Jacky Chou
2025-06-13 9:54 ` Krzysztof Kozlowski
2025-06-23 2:42 ` 回覆: " Jacky Chou
2025-06-13 12:03 ` Ilpo Järvinen
2025-06-23 5:41 ` Jacky Chou
2025-06-24 10:50 ` Ilpo Järvinen
2025-06-24 11:11 ` 回覆: " Jacky Chou
2025-06-24 15:40 ` Bjorn Helgaas
2025-06-25 8:32 ` 回覆: " Jacky Chou
2025-06-13 16:28 ` Bjorn Helgaas
2025-06-20 6:05 ` 回覆: " Jacky Chou
2025-06-24 15:33 ` Bjorn Helgaas
2025-06-14 2:07 ` kernel test robot
2025-06-19 8:14 ` kernel test robot
2025-06-13 9:18 ` [PATCH 0/7] Add ASPEED PCIe Root Complex support neil.armstrong
2025-06-20 8:20 ` 回覆: " Jacky Chou
2025-06-24 7:29 ` Neil Armstrong
2025-06-24 10:54 ` 回覆: " Jacky Chou
2025-06-16 21:46 ` Rob Herring (Arm)
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