From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B1C5B26C3A8; Thu, 26 Jun 2025 10:29:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750933751; cv=none; b=jLL+Y79SBkOJw9p3X+5DcCCucDFIPVicx/7CrUXuZHhpRDOLOkdRjMTlH5tudc7uNReAC9lqy2B9DslsW1GsbTj8EBHRekKT9AcB9BiXmj4w8Uti+YD71sImJytygiAPN0rrEpBwyr6xGgrm3Hi5yidlS5+VAbcvIRKTDWxsc6U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1750933751; c=relaxed/simple; bh=AE5qEvFqtJU+4ZCRYFV782k0O7SoTYBIs/KLVihEjS4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tyunYLMwcmKsPiRvrHM3C3ivnH4zVhzP+8FgsP5g35W1BekibwtLFXk/qF6O/JYVIik1kh+m03DOdiCUqsjb4oeigJ/b7onqWKbrFycbXjsilQZJ/BGqHMGEl3teqae0wxNukRyBXMl65X9dCAhge9dmEdgRpPMetzUgN8rTsQI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=lGo+BQhg; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="lGo+BQhg" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9D839C4CEEB; Thu, 26 Jun 2025 10:29:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1750933751; bh=AE5qEvFqtJU+4ZCRYFV782k0O7SoTYBIs/KLVihEjS4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=lGo+BQhgUeV3xAtymSOxC5JoyS10rPV4fQYncFC4h4/BRH6euJn9DM3HQnJZchT+8 QeG/pr23cxeTSfquau6eUSQu8TlvKdyxFkNMWMEXwsQ2KM2ibFKXv/DP0slYrI9RnR mIPd3gQhc27jHEn4sINdn/F4d/zaefKjuTlJuNIGFPJ6Qj7ahZRFqzRf8xaVgkONLK ZQs0DHTCo1G06rOrw1na1uq77vS5sfWz3R4DQHKtqxvu/fGOOHOS0Fx4feJFtdUFu2 RKT3tIgJyIue5CJ61B0LDmvuFCdsNC68mq0/RaQq7hQmEBZaRWJ48W7lEllO+gdsia Mh7SI2fxpcTuA== From: Lorenzo Pieralisi Date: Thu, 26 Jun 2025 12:26:22 +0200 Subject: [PATCH v6 31/31] arm64: Kconfig: Enable GICv5 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20250626-gicv5-host-v6-31-48e046af4642@kernel.org> References: <20250626-gicv5-host-v6-0-48e046af4642@kernel.org> In-Reply-To: <20250626-gicv5-host-v6-0-48e046af4642@kernel.org> To: Marc Zyngier , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon Cc: Arnd Bergmann , Sascha Bischoff , Jonathan Cameron , Timothy Hayes , Bjorn Helgaas , "Liam R. Howlett" , Peter Maydell , Mark Rutland , Jiri Slaby , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Lorenzo Pieralisi X-Mailer: b4 0.15-dev-6f78e Enable GICv5 driver code for the ARM64 architecture. Signed-off-by: Lorenzo Pieralisi Cc: Will Deacon Cc: Catalin Marinas Cc: Marc Zyngier --- arch/arm64/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 55fc331af337..5ff757cb7cd2 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -129,6 +129,7 @@ config ARM64 select ARM_GIC_V2M if PCI select ARM_GIC_V3 select ARM_GIC_V3_ITS if PCI + select ARM_GIC_V5 select ARM_PSCI_FW select BUILDTIME_TABLE_SORT select CLONE_BACKWARDS -- 2.48.0