From: Rob Herring <robh@kernel.org>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Cc: jianjun.wang@mediatek.com, ryder.lee@mediatek.com,
bhelgaas@google.com, lpieralisi@kernel.org,
kwilczynski@kernel.org, manivannan.sadhasivam@linaro.org,
krzk+dt@kernel.org, conor+dt@kernel.org, matthias.bgg@gmail.com,
linux-pci@vger.kernel.org, linux-mediatek@lists.infradead.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel@collabora.com
Subject: Re: [PATCH v1 2/3] dt-bindings: PCI: mediatek-gen3: Add support for MT6991/MT8196
Date: Fri, 27 Jun 2025 15:11:52 -0500 [thread overview]
Message-ID: <20250627201152.GA4114099-robh@kernel.org> (raw)
In-Reply-To: <20250623120058.109036-3-angelogioacchino.delregno@collabora.com>
On Mon, Jun 23, 2025 at 02:00:57PM +0200, AngeloGioacchino Del Regno wrote:
> Add compatible strings for MT8196 and MT6991 (which are fully
> compatible between each other) and clock definitions.
>
> These new SoCs don't have tl_96m and tl_32k clocks, but need
> an AHB to APB bus clock and a low power clock.
>
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> ---
> .../bindings/pci/mediatek-pcie-gen3.yaml | 35 +++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> index 162406e0691a..02cddf0246ce 100644
> --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
> @@ -52,7 +52,12 @@ properties:
> - mediatek,mt8188-pcie
> - mediatek,mt8195-pcie
> - const: mediatek,mt8192-pcie
> + - items:
> + - enum:
> + - mediatek,mt6991-pcie
> + - const: mediatek,mt8196-pcie
> - const: mediatek,mt8192-pcie
> + - const: mediatek,mt8196-pcie
> - const: airoha,en7581-pcie
>
> reg:
> @@ -212,6 +217,36 @@ allOf:
>
> mediatek,pbus-csr: false
>
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - mediatek,mt8196-pcie
> + then:
> + properties:
> + clocks:
> + minItems: 6
> +
> + clock-names:
> + items:
> + - const: pl_250m
> + - const: tl_26m
> + - const: bus
> + - const: low_power
> + - const: peri_26m
> + - const: peri_mem
> +
> + resets:
> + minItems: 1
The min is already 1.
> + maxItems: 2
> +
> + reset-names:
> + minItems: 1
> + maxItems: 2
It would be good to define what the names are. I assume they are fixed
and not just any of the allowed ones.
> +
> + mediatek,pbus-csr: false
> +
> - if:
> properties:
> compatible:
> --
> 2.49.0
>
next prev parent reply other threads:[~2025-06-27 20:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-23 12:00 [PATCH v1 0/3] mediatek-gen3: Add support for MT8196/MT6991 AngeloGioacchino Del Regno
2025-06-23 12:00 ` [PATCH v1 1/3] PCI: mediatek-gen3: Implement sys clock ready time setting AngeloGioacchino Del Regno
2025-06-23 12:00 ` [PATCH v1 2/3] dt-bindings: PCI: mediatek-gen3: Add support for MT6991/MT8196 AngeloGioacchino Del Regno
2025-06-27 20:11 ` Rob Herring [this message]
2025-06-23 12:00 ` [PATCH v1 3/3] PCI: mediatek-gen3: Add support for MediaTek MT8196 SoC AngeloGioacchino Del Regno
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