From: Jason Gunthorpe <jgg@nvidia.com>
To: Alex Williamson <alex.williamson@redhat.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
iommu@lists.linux.dev, Joerg Roedel <joro@8bytes.org>,
linux-pci@vger.kernel.org, Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>,
Lu Baolu <baolu.lu@linux.intel.com>,
galshalom@nvidia.com, Joerg Roedel <jroedel@suse.de>,
Kevin Tian <kevin.tian@intel.com>,
kvm@vger.kernel.org, maorg@nvidia.com, patches@lists.linux.dev,
tdave@nvidia.com, Tony Zhu <tony.zhu@intel.com>
Subject: Re: [PATCH 02/11] PCI: Add pci_bus_isolation()
Date: Tue, 1 Jul 2025 22:00:58 -0300 [thread overview]
Message-ID: <20250702010058.GA1051729@nvidia.com> (raw)
In-Reply-To: <20250701132859.2a6661a7.alex.williamson@redhat.com>
On Tue, Jul 01, 2025 at 01:28:59PM -0600, Alex Williamson wrote:
> > +static bool pci_has_mmio(struct pci_dev *pdev)
> > +{
> > + unsigned int i;
> > +
> > + for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
> > + struct resource *res = pci_resource_n(pdev, i);
> > +
> > + if (resource_size(res) && resource_type(res) == IORESOURCE_MEM)
> > + return true;
> > + }
> > + return false;
> > +}
>
> Maybe the intent is to make this as generic as possible, but it seems
> to only be used for bridge devices, so technically it could get
> away with testing only the first two resources, right?
Yes, the intent was to be general, yes it could probably check only
the two type1 BARs, however I was thinking the ROM should be included
too, but I don't recall if type 1 has a ROM BAR or not..
> > +enum pci_bus_isolation pci_bus_isolated(struct pci_bus *bus)
> > +{
> > + struct pci_dev *bridge = bus->self;
> > + int type;
> > +
> > + /* Consider virtual busses isolated */
> > + if (!bridge)
> > + return PCIE_ISOLATED;
> > + if (pci_is_root_bus(bus))
> > + return PCIE_ISOLATED;
>
> How do we know the root bus isn't conventional? I suppose this is only
> called by IOMMU code, but QEMU can make some pretty weird
> configurations.
I feel pretty wobbly on the root bus and root port parts here. So I'm
not sure about this. My ARM system doesn't seem to have these in the
same way.
Since we have a bus->self maybe it should be checking the bus->self's
type the same as normal but we should not inherit bus->self's group in
the iommu.c code?
Jason
next prev parent reply other threads:[~2025-07-02 1:01 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-30 22:28 [PATCH 00/11] Fix incorrect iommu_groups with PCIe switches Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 01/11] PCI: Move REQ_ACS_FLAGS into pci_regs.h as PCI_ACS_ISOLATED Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 02/11] PCI: Add pci_bus_isolation() Jason Gunthorpe
2025-07-01 19:28 ` Alex Williamson
2025-07-02 1:00 ` Jason Gunthorpe [this message]
2025-07-03 15:30 ` Jason Gunthorpe
2025-07-03 22:17 ` Alex Williamson
2025-07-03 23:08 ` Alex Williamson
2025-07-03 23:21 ` Jason Gunthorpe
2025-07-03 23:15 ` Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 03/11] iommu: Compute iommu_groups properly for PCIe switches Jason Gunthorpe
2025-07-01 19:29 ` Alex Williamson
2025-07-02 1:04 ` Jason Gunthorpe
2025-07-17 19:25 ` Donald Dutile
2025-07-17 20:27 ` Jason Gunthorpe
2025-07-18 2:31 ` Donald Dutile
2025-07-18 13:32 ` Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 04/11] iommu: Organize iommu_group by member size Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 05/11] PCI: Add pci_reachable_set() Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 06/11] iommu: Use pci_reachable_set() in pci_device_group() Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 07/11] iommu: Validate that pci_for_each_dma_alias() matches the groups Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 08/11] PCI: Add the ACS Enhanced Capability definitions Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 09/11] PCI: Enable ACS Enhanced bits for enable_acs and config_acs Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 10/11] PCI: Check ACS DSP/USP redirect bits in pci_enable_pasid() Jason Gunthorpe
2025-06-30 22:28 ` [PATCH 11/11] PCI: Check ACS Extended flags for pci_bus_isolated() Jason Gunthorpe
2025-07-01 21:48 ` [PATCH 00/11] Fix incorrect iommu_groups with PCIe switches Alex Williamson
2025-07-02 1:47 ` Jason Gunthorpe
2025-07-04 0:37 ` Jason Gunthorpe
2025-07-11 14:55 ` Alex Williamson
2025-07-11 16:08 ` Jason Gunthorpe
2025-07-08 20:47 ` Jason Gunthorpe
2025-07-11 15:40 ` Alex Williamson
2025-07-11 16:14 ` Jason Gunthorpe
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