From: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Marc Zyngier <maz@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>
Cc: Arnd Bergmann <arnd@arndb.de>,
Sascha Bischoff <sascha.bischoff@arm.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Timothy Hayes <timothy.hayes@arm.com>,
Bjorn Helgaas <bhelgaas@google.com>,
"Liam R. Howlett" <Liam.Howlett@oracle.com>,
Peter Maydell <peter.maydell@linaro.org>,
Mark Rutland <mark.rutland@arm.com>,
Jiri Slaby <jirislaby@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
linux-pci@vger.kernel.org,
Lorenzo Pieralisi <lpieralisi@kernel.org>
Subject: [PATCH v7 05/31] arm64/sysreg: Add ICC_PPI_HMR<n>_EL1
Date: Thu, 03 Jul 2025 12:24:55 +0200 [thread overview]
Message-ID: <20250703-gicv5-host-v7-5-12e71f1b3528@kernel.org> (raw)
In-Reply-To: <20250703-gicv5-host-v7-0-12e71f1b3528@kernel.org>
Add ICC_PPI_HMR<n>_EL1 registers sysreg description.
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
---
arch/arm64/tools/sysreg | 75 +++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 75 insertions(+)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 81b32f567ce3..7f096efee4e7 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -3024,6 +3024,81 @@ Sysreg PMIAR_EL1 3 0 9 14 7
Field 63:0 ADDRESS
EndSysreg
+SysregFields ICC_PPI_HMRx_EL1
+Field 63 HM63
+Field 62 HM62
+Field 61 HM61
+Field 60 HM60
+Field 59 HM59
+Field 58 HM58
+Field 57 HM57
+Field 56 HM56
+Field 55 HM55
+Field 54 HM54
+Field 53 HM53
+Field 52 HM52
+Field 51 HM51
+Field 50 HM50
+Field 49 HM49
+Field 48 HM48
+Field 47 HM47
+Field 46 HM46
+Field 45 HM45
+Field 44 HM44
+Field 43 HM43
+Field 42 HM42
+Field 41 HM41
+Field 40 HM40
+Field 39 HM39
+Field 38 HM38
+Field 37 HM37
+Field 36 HM36
+Field 35 HM35
+Field 34 HM34
+Field 33 HM33
+Field 32 HM32
+Field 31 HM31
+Field 30 HM30
+Field 29 HM29
+Field 28 HM28
+Field 27 HM27
+Field 26 HM26
+Field 25 HM25
+Field 24 HM24
+Field 23 HM23
+Field 22 HM22
+Field 21 HM21
+Field 20 HM20
+Field 19 HM19
+Field 18 HM18
+Field 17 HM17
+Field 16 HM16
+Field 15 HM15
+Field 14 HM14
+Field 13 HM13
+Field 12 HM12
+Field 11 HM11
+Field 10 HM10
+Field 9 HM9
+Field 8 HM8
+Field 7 HM7
+Field 6 HM6
+Field 5 HM5
+Field 4 HM4
+Field 3 HM3
+Field 2 HM2
+Field 1 HM1
+Field 0 HM0
+EndSysregFields
+
+Sysreg ICC_PPI_HMR0_EL1 3 0 12 10 0
+Fields ICC_PPI_HMRx_EL1
+EndSysreg
+
+Sysreg ICC_PPI_HMR1_EL1 3 0 12 10 1
+Fields ICC_PPI_HMRx_EL1
+EndSysreg
+
Sysreg ICC_ICSR_EL1 3 0 12 10 4
Res0 63:48
Field 47:32 IAFFID
--
2.48.0
next prev parent reply other threads:[~2025-07-03 10:25 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-03 10:24 [PATCH v7 00/31] Arm GICv5: Host driver implementation Lorenzo Pieralisi
2025-07-03 10:24 ` [PATCH v7 01/31] dt-bindings: interrupt-controller: Add Arm GICv5 Lorenzo Pieralisi
2025-07-03 10:24 ` [PATCH v7 02/31] arm64/sysreg: Add GCIE field to ID_AA64PFR2_EL1 Lorenzo Pieralisi
2025-07-03 15:57 ` Catalin Marinas
2025-07-03 10:24 ` [PATCH v7 03/31] arm64/sysreg: Add ICC_PPI_PRIORITY<n>_EL1 Lorenzo Pieralisi
2025-07-03 15:58 ` Catalin Marinas
2025-07-03 10:24 ` [PATCH v7 04/31] arm64/sysreg: Add ICC_ICSR_EL1 Lorenzo Pieralisi
2025-07-03 15:58 ` Catalin Marinas
2025-07-03 10:24 ` Lorenzo Pieralisi [this message]
2025-07-03 15:58 ` [PATCH v7 05/31] arm64/sysreg: Add ICC_PPI_HMR<n>_EL1 Catalin Marinas
2025-07-03 10:24 ` [PATCH v7 06/31] arm64/sysreg: Add ICC_PPI_ENABLER<n>_EL1 Lorenzo Pieralisi
2025-07-03 15:58 ` Catalin Marinas
2025-07-03 10:24 ` [PATCH v7 07/31] arm64/sysreg: Add ICC_PPI_{C/S}ACTIVER<n>_EL1 Lorenzo Pieralisi
2025-07-03 15:59 ` Catalin Marinas
2025-07-03 10:24 ` [PATCH v7 08/31] arm64/sysreg: Add ICC_PPI_{C/S}PENDR<n>_EL1 Lorenzo Pieralisi
2025-07-03 15:59 ` Catalin Marinas
2025-07-03 10:24 ` [PATCH v7 09/31] arm64/sysreg: Add ICC_CR0_EL1 Lorenzo Pieralisi
2025-07-03 15:59 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 10/31] arm64/sysreg: Add ICC_PCR_EL1 Lorenzo Pieralisi
2025-07-03 16:00 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 11/31] arm64/sysreg: Add ICC_IDR0_EL1 Lorenzo Pieralisi
2025-07-03 16:01 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 12/31] arm64/sysreg: Add ICH_HFGRTR_EL2 Lorenzo Pieralisi
2025-07-03 16:02 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 13/31] arm64/sysreg: Add ICH_HFGWTR_EL2 Lorenzo Pieralisi
2025-07-03 16:02 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 14/31] arm64/sysreg: Add ICH_HFGITR_EL2 Lorenzo Pieralisi
2025-07-03 16:02 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 15/31] arm64: Disable GICv5 read/write/instruction traps Lorenzo Pieralisi
2025-07-03 16:03 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 16/31] arm64: cpucaps: Rename GICv3 CPU interface capability Lorenzo Pieralisi
2025-07-03 16:03 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 17/31] arm64: cpucaps: Add GICv5 CPU interface (GCIE) capability Lorenzo Pieralisi
2025-07-03 16:04 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 18/31] arm64: smp: Support non-SGIs for IPIs Lorenzo Pieralisi
2025-07-03 16:04 ` Catalin Marinas
2025-07-15 14:10 ` Breno Leitao
2025-07-15 14:34 ` Lorenzo Pieralisi
2025-07-15 16:07 ` Lorenzo Pieralisi
2025-07-15 16:14 ` Breno Leitao
2025-07-03 10:25 ` [PATCH v7 19/31] arm64: Add support for GICv5 GSB barriers Lorenzo Pieralisi
2025-07-03 16:04 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 20/31] irqchip/gic-v5: Add GICv5 PPI support Lorenzo Pieralisi
2025-07-03 16:05 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 21/31] irqchip/gic-v5: Add GICv5 IRS/SPI support Lorenzo Pieralisi
2025-07-03 16:07 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 22/31] irqchip/gic-v5: Add GICv5 LPI/IPI support Lorenzo Pieralisi
2025-07-03 16:07 ` Catalin Marinas
2025-08-07 11:52 ` Jinjie Ruan
2025-08-07 13:51 ` Lorenzo Pieralisi
2025-08-08 1:20 ` Jinjie Ruan
2025-08-08 8:19 ` Lorenzo Pieralisi
2025-08-08 8:48 ` Jinjie Ruan
2025-07-03 10:25 ` [PATCH v7 23/31] irqchip/gic-v5: Enable GICv5 SMP booting Lorenzo Pieralisi
2025-07-03 10:25 ` [PATCH v7 24/31] of/irq: Add of_msi_xlate() helper function Lorenzo Pieralisi
2025-07-03 14:52 ` Rob Herring
2025-07-03 10:25 ` [PATCH v7 25/31] PCI/MSI: Add pci_msi_map_rid_ctlr_node() " Lorenzo Pieralisi
2025-07-03 10:25 ` [PATCH v7 26/31] irqchip/gic-v3: Rename GICv3 ITS MSI parent Lorenzo Pieralisi
2025-07-03 10:25 ` [PATCH v7 27/31] irqchip/msi-lib: Add IRQ_DOMAIN_FLAG_FWNODE_PARENT handling Lorenzo Pieralisi
2025-07-03 10:25 ` [PATCH v7 28/31] irqchip/gic-v5: Add GICv5 ITS support Lorenzo Pieralisi
2025-07-03 10:25 ` [PATCH v7 29/31] irqchip/gic-v5: Add GICv5 IWB support Lorenzo Pieralisi
2025-07-03 10:25 ` [PATCH v7 30/31] docs: arm64: gic-v5: Document booting requirements for GICv5 Lorenzo Pieralisi
2025-07-03 16:08 ` Catalin Marinas
2025-07-03 10:25 ` [PATCH v7 31/31] arm64: Kconfig: Enable GICv5 Lorenzo Pieralisi
2025-07-03 16:09 ` Catalin Marinas
2025-07-03 15:47 ` [PATCH v7 00/31] Arm GICv5: Host driver implementation Jonathan Cameron
2025-07-04 10:01 ` Lorenzo Pieralisi
2025-07-08 18:18 ` Marc Zyngier
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