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([82.78.167.83]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ae3f66d9215sm194703766b.2.2025.07.04.09.14.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jul 2025 09:14:34 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: bhelgaas@google.com, lpieralisi@kernel.org, kwilczynski@kernel.org, mani@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, geert+renesas@glider.be, magnus.damm@gmail.com, catalin.marinas@arm.com, will@kernel.org, mturquette@baylibre.com, sboyd@kernel.org, p.zabel@pengutronix.de, lizhi.hou@amd.com Cc: claudiu.beznea@tuxon.dev, linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, Claudiu Beznea Subject: [PATCH v3 0/9] PCI: rzg3s-host: Add PCIe driver for Renesas RZ/G3S SoC Date: Fri, 4 Jul 2025 19:14:00 +0300 Message-ID: <20250704161410.3931884-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Claudiu Beznea Hi, Series adds a PCIe driver for the Renesas RZ/G3S SoC. It is split as follows: - patch 1/9: updates the max register offset for RZ/G3S SYSC; this is necessary as the PCIe need to setup the SYSC for proper functioning - patch 2/9: adds clocks and resets support for the PCIe IP - patch 3/9: fix the legacy interrupt request failure - patches 4-5/9: add PCIe support for the RZ/G3S SoC - patches 6-9/9: add device tree support and defconfig flag Please provide your feedback. Merge strategy, if any: - patches 1-2,6-9/9 can go through the Renesas tree - patches 3-5/9 can go through the PCI tree Thank you, Claudiu Beznea Changes in v3: - added patch "PCI: of_property: Restore the arguments of the next level parent" to fix the legacy interrupt request - addressed review comments - per-patch changes are described in each individual patch Changes in v2: - dropped "of/irq: Export of_irq_count()" as it is not needed anymore in this version - added "arm64: dts: renesas: rzg3s-smarc-som: Update dma-ranges for PCIe" to reflect the board specific memory constraints - addressed review comments - updated patch "soc: renesas: rz-sysc: Add syscon/regmap support" - per-patch changes are described in each individual patch Claudiu Beznea (8): clk: renesas: r9a08g045: Add clocks and resets support for PCIe PCI: of_property: Restore the arguments of the next level parent dt-bindings: PCI: renesas,r9a08g045s33-pcie: Add documentation for the PCIe IP on Renesas RZ/G3S PCI: rzg3s-host: Add Initial PCIe Host Driver for Renesas RZ/G3S SoC arm64: dts: renesas: r9a08g045s33: Add PCIe node arm64: dts: renesas: rzg3s-smarc-som: Update dma-ranges for PCIe arm64: dts: renesas: rzg3s-smarc: Enable PCIe arm64: defconfig: Enable PCIe for the Renesas RZ/G3S SoC John Madieu (1): soc: renesas: rz-sysc: Add syscon/regmap support .../pci/renesas,r9a08g045s33-pcie.yaml | 202 ++ MAINTAINERS | 8 + arch/arm64/boot/dts/renesas/r9a08g045s33.dtsi | 60 + .../boot/dts/renesas/rzg3s-smarc-som.dtsi | 5 + arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 11 + arch/arm64/configs/defconfig | 1 + drivers/clk/renesas/r9a08g045-cpg.c | 19 + drivers/pci/controller/Kconfig | 7 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pcie-rzg3s-host.c | 1715 +++++++++++++++++ drivers/pci/of_property.c | 8 + drivers/soc/renesas/Kconfig | 1 + drivers/soc/renesas/r9a08g045-sysc.c | 10 + drivers/soc/renesas/r9a09g047-sys.c | 10 + drivers/soc/renesas/r9a09g057-sys.c | 10 + drivers/soc/renesas/rz-sysc.c | 17 +- drivers/soc/renesas/rz-sysc.h | 3 + 17 files changed, 2087 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/pci/renesas,r9a08g045s33-pcie.yaml create mode 100644 drivers/pci/controller/pcie-rzg3s-host.c -- 2.43.0