From: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
To: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
cros-qcom-dts-watchers@chromium.org,
Bjorn Helgaas <bhelgaas@google.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Pavel Machek <pavel@kernel.org>, Len Brown <lenb@kernel.org>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Danilo Krummrich <dakr@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
quic_vbadigan@quicinc.com, quic_mrana@quicinc.com,
sherry.sun@nxp.com, linux-pm@vger.kernel.org,
Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
Manivannan Sadhasivam <mani@kernel.org>
Subject: [PATCH v4 1/3] arm64: dts: qcom: sc7280: Add wake GPIO
Date: Fri, 01 Aug 2025 16:29:42 +0530 [thread overview]
Message-ID: <20250801-wake_irq_support-v4-1-6b6639013a1a@oss.qualcomm.com> (raw)
In-Reply-To: <20250801-wake_irq_support-v4-0-6b6639013a1a@oss.qualcomm.com>
Add WAKE# gpio which is needed to bring PCIe device state
from D3cold to D0.
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 1 +
arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi | 1 +
arch/arm64/boot/dts/qcom/sc7280-idp.dtsi | 1 +
3 files changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
index 10c152ac03c874df5f1dc386d9079d3db1c55362..a4d85772f86955ad061433b138581fa9d81110a4 100644
--- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
+++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts
@@ -810,6 +810,7 @@ &mdss_edp_phy {
&pcieport1 {
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
&pcie1 {
diff --git a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
index 60b3cf50ea1d61dd5e8b573b5f1c6faa1c291eee..5e73060771329cade097bf1a71056a456a7937d7 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-herobrine.dtsi
@@ -477,6 +477,7 @@ &pcie1 {
&pcieport1 {
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
&pm8350c_pwm {
diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
index 0b0212b670797a364d7f0e7a458fc73245fff8db..240513774612fb2bfcdb951e5a5a77c49f49eb82 100644
--- a/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dtsi
@@ -418,6 +418,7 @@ &lpass_va_macro {
&pcieport1 {
reset-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
};
&pcie1 {
--
2.34.1
next prev parent reply other threads:[~2025-08-01 10:59 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-01 10:59 [PATCH v4 0/3] PCI: Add support for PCIe WAKE# interrupt Krishna Chaitanya Chundru
2025-08-01 10:59 ` Krishna Chaitanya Chundru [this message]
2025-08-11 16:36 ` [PATCH v4 1/3] arm64: dts: qcom: sc7280: Add wake GPIO Bjorn Andersson
2025-08-12 3:49 ` Krishna Chaitanya Chundru
2025-08-01 10:59 ` [PATCH v4 2/3] PM: sleep: wakeirq: Add support for custom IRQ flags in dedicated wake IRQ setup Krishna Chaitanya Chundru
2025-08-01 21:31 ` Bjorn Helgaas
2025-08-02 9:35 ` Rafael J. Wysocki
2025-08-01 10:59 ` [PATCH v4 3/3] PCI: Add support for PCIe WAKE# interrupt Krishna Chaitanya Chundru
2025-08-01 21:27 ` Bjorn Helgaas
2025-08-04 9:56 ` Manivannan Sadhasivam
2025-08-04 10:15 ` [PATCH v4 0/3] " Manivannan Sadhasivam
2025-08-04 15:50 ` Bjorn Helgaas
2025-08-27 13:58 ` Manivannan Sadhasivam
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