From: Bjorn Helgaas <helgaas@kernel.org>
To: Jim Quinlan <james.quinlan@broadcom.com>
Cc: linux-pci@vger.kernel.org,
"Nicolas Saenz Julienne" <nsaenz@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lorenzo.pieralisi@arm.com>,
"Cyril Brulebois" <kibi@debian.org>,
bcm-kernel-feedback-list@broadcom.com, jim2101024@gmail.com,
"Florian Fainelli" <florian.fainelli@broadcom.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-rpi-kernel@lists.infradead.org>,
"moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE"
<linux-arm-kernel@lists.infradead.org>,
"open list" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 2/2] PCI: brcmstb: Add panic/die handler to driver
Date: Wed, 6 Aug 2025 13:15:40 -0500 [thread overview]
Message-ID: <20250806181540.GA8692@bhelgaas> (raw)
In-Reply-To: <20250613220843.698227-3-james.quinlan@broadcom.com>
On Fri, Jun 13, 2025 at 06:08:43PM -0400, Jim Quinlan wrote:
> Whereas most PCIe HW returns 0xffffffff on illegal accesses and the like,
> by default Broadcom's STB PCIe controller effects an abort. Some SoCs --
> 7216 and its descendants -- have new HW that identifies error details.
What's the long term plan for this? This abort is a huge problem that
we're seeing across arm64 platforms. Forcing a panic and reboot for
every uncorrectable error is pretty hard to deal with.
Is there a plan to someday recover from these aborts? Or change the
hardware so it can at least be configured to return ~0 data after
logging the error in the hardware registers?
> This simple handler determines if the PCIe controller was the cause of the
> abort and if so, prints out diagnostic info. Unfortunately, an abort still
> occurs.
>
> Care is taken to read the error registers only when the PCIe bridge is
> active and the PCIe registers are acceptable. Otherwise, a "die" event
> caused by something other than the PCIe could cause an abort if the PCIe
> "die" handler tried to access registers when the bridge is off.
Checking whether the bridge is active is a "mostly-works" situation
since it's always racy.
> Example error output:
> brcm-pcie 8b20000.pcie: Error: Mem Acc: 32bit, Read, @0x38000000
> brcm-pcie 8b20000.pcie: Type: TO=0 Abt=0 UnspReq=1 AccDsble=0 BadAddr=0
next prev parent reply other threads:[~2025-08-06 18:15 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-13 22:08 [PATCH 0/2] PCI: brcmstb: Add panic/die handler to driver Jim Quinlan
2025-06-13 22:08 ` [PATCH 1/2] PCI: brcmstb: Add a way to indicate if PCIe bridge is active Jim Quinlan
2025-06-13 23:23 ` Florian Fainelli
2025-08-06 19:14 ` Bjorn Helgaas
2025-08-07 18:03 ` Jim Quinlan
2025-06-13 22:08 ` [PATCH 2/2] PCI: brcmstb: Add panic/die handler to driver Jim Quinlan
2025-06-13 23:28 ` Florian Fainelli
2025-08-06 18:15 ` Bjorn Helgaas [this message]
2025-08-06 18:38 ` Jim Quinlan
2025-08-06 18:50 ` Bjorn Helgaas
2025-08-06 19:16 ` Jim Quinlan
2025-08-06 20:41 ` Florian Fainelli
2025-08-07 5:26 ` Manivannan Sadhasivam
2025-08-07 14:40 ` Jim Quinlan
2025-08-07 17:00 ` Florian Fainelli
2025-08-06 19:14 ` Bjorn Helgaas
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