From: Inochi Amaoto <inochiama@gmail.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Bjorn Helgaas <bhelgaas@google.com>,
Marc Zyngier <maz@kernel.org>,
Lorenzo Pieralisi <lpieralisi@kernel.org>,
Inochi Amaoto <inochiama@gmail.com>,
Saurabh Sengar <ssengar@linux.microsoft.com>,
Shradha Gupta <shradhagupta@linux.microsoft.com>,
Jonathan Cameron <Jonathan.Cameron@huwei.com>,
Nicolin Chen <nicolinc@nvidia.com>,
Jason Gunthorpe <jgg@ziepe.ca>,
Chen Wang <unicorn_wang@outlook.com>
Cc: linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
Yixun Lan <dlan@gentoo.org>, Longbin Li <looong.bin@gmail.com>,
Han Gao <rabenda.cn@gmail.com>
Subject: [PATCH 3/4] irqchip/sg2042-msi: Fix broken affinity setting
Date: Thu, 7 Aug 2025 19:23:24 +0800 [thread overview]
Message-ID: <20250807112326.748740-4-inochiama@gmail.com> (raw)
In-Reply-To: <20250807112326.748740-1-inochiama@gmail.com>
When using NVME on SG2044, the NVME always complains "I/O tag XXX
(XXX) QID XX timeout, completion polled", which is caused by the
broken handler of the sg2042-msi driver.
As PLIC driver can only setting affinity when enabling, the sg2042-msi
does not properly handled affinity setting previously and enable irq in
an unexpected executing path.
Since the PCI template domain supports irq_startup/irq_shutdown, set
irq_chip_[startup/shutdown]_parent for irq_startup/irq_shutdown. So
the irq can be started properly.
Fixes: e96b93a97c90 ("irqchip/sg2042-msi: Add the Sophgo SG2044 MSI interrupt controller")
Reported-by: Han Gao <rabenda.cn@gmail.com>
Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
---
drivers/irqchip/irq-sg2042-msi.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/irqchip/irq-sg2042-msi.c b/drivers/irqchip/irq-sg2042-msi.c
index bcfddc51bc6a..2b7ee17232ab 100644
--- a/drivers/irqchip/irq-sg2042-msi.c
+++ b/drivers/irqchip/irq-sg2042-msi.c
@@ -85,6 +85,8 @@ static void sg2042_msi_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *m
static const struct irq_chip sg2042_msi_middle_irq_chip = {
.name = "SG2042 MSI",
+ .irq_startup = irq_chip_startup_parent,
+ .irq_shutdown = irq_chip_shutdown_parent,
.irq_ack = sg2042_msi_irq_ack,
.irq_mask = irq_chip_mask_parent,
.irq_unmask = irq_chip_unmask_parent,
@@ -114,6 +116,8 @@ static void sg2044_msi_irq_compose_msi_msg(struct irq_data *d, struct msi_msg *m
static struct irq_chip sg2044_msi_middle_irq_chip = {
.name = "SG2044 MSI",
+ .irq_startup = irq_chip_startup_parent,
+ .irq_shutdown = irq_chip_shutdown_parent,
.irq_ack = sg2044_msi_irq_ack,
.irq_mask = irq_chip_mask_parent,
.irq_unmask = irq_chip_unmask_parent,
@@ -186,7 +190,9 @@ static const struct irq_domain_ops sg204x_msi_middle_domain_ops = {
};
#define SG2042_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
- MSI_FLAG_USE_DEF_CHIP_OPS)
+ MSI_FLAG_USE_DEF_CHIP_OPS | \
+ MSI_FLAG_PCI_MSI_MASK_PARENT |\
+ MSI_FLAG_PCI_MSI_STARTUP_PARENT)
#define SG2042_MSI_FLAGS_SUPPORTED MSI_GENERIC_FLAGS_MASK
@@ -201,7 +207,9 @@ static const struct msi_parent_ops sg2042_msi_parent_ops = {
};
#define SG2044_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \
- MSI_FLAG_USE_DEF_CHIP_OPS)
+ MSI_FLAG_USE_DEF_CHIP_OPS | \
+ MSI_FLAG_PCI_MSI_MASK_PARENT |\
+ MSI_FLAG_PCI_MSI_STARTUP_PARENT)
#define SG2044_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \
MSI_FLAG_PCI_MSIX)
--
2.50.1
next prev parent reply other threads:[~2025-08-07 11:24 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-07 11:23 [PATCH 0/4] irqchip/sg2042-msi: Fix broken affinity setting Inochi Amaoto
2025-08-07 11:23 ` [PATCH 1/4] genirq: Add irq_chip_(startup/shutdown)_parent Inochi Amaoto
2025-08-11 14:37 ` Thomas Gleixner
2025-08-11 22:32 ` Inochi Amaoto
2025-08-11 14:39 ` Andy Shevchenko
2025-08-07 11:23 ` [PATCH 2/4] PCI/MSI: Add startup/shutdown support for per device MSI[X] domains Inochi Amaoto
2025-08-07 16:25 ` Bjorn Helgaas
2025-08-07 23:18 ` Inochi Amaoto
2025-08-11 14:29 ` Thomas Gleixner
2025-08-07 11:23 ` Inochi Amaoto [this message]
2025-08-11 14:43 ` [PATCH 3/4] irqchip/sg2042-msi: Fix broken affinity setting Andy Shevchenko
2025-08-11 22:37 ` Inochi Amaoto
2025-08-13 12:54 ` Andy Shevchenko
2025-08-07 11:23 ` [PATCH 4/4] irqchip/sg2042-msi: Set MSI_FLAG_MULTI_PCI_MSI flags for SG2044 Inochi Amaoto
2025-08-11 14:33 ` Thomas Gleixner
2025-08-11 22:36 ` Inochi Amaoto
2025-08-11 23:15 ` Inochi Amaoto
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