From: Jason Gunthorpe <jgg@nvidia.com>
To: Nicolin Chen <nicolinc@nvidia.com>
Cc: Ethan Zhao <etzhao1900@gmail.com>,
robin.murphy@arm.com, joro@8bytes.org, bhelgaas@google.com,
will@kernel.org, robin.clark@oss.qualcomm.com,
yong.wu@mediatek.com, matthias.bgg@gmail.com,
angelogioacchino.delregno@collabora.com,
thierry.reding@gmail.com, vdumpa@nvidia.com,
jonathanh@nvidia.com, rafael@kernel.org, lenb@kernel.org,
kevin.tian@intel.com, yi.l.liu@intel.com,
baolu.lu@linux.intel.com, linux-arm-kernel@lists.infradead.org,
iommu@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
linux-mediatek@lists.infradead.org, linux-tegra@vger.kernel.org,
linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
patches@lists.linux.dev, pjaroszynski@nvidia.com,
vsethi@nvidia.com, helgaas@kernel.org
Subject: Re: [PATCH v3 5/5] pci: Suspend iommu function prior to resetting a device
Date: Thu, 21 Aug 2025 10:07:41 -0300 [thread overview]
Message-ID: <20250821130741.GL802098@nvidia.com> (raw)
In-Reply-To: <aKTzq6SLGB22Xq5b@Asurada-Nvidia>
On Tue, Aug 19, 2025 at 02:59:07PM -0700, Nicolin Chen wrote:
> c) multiple pci_devs with their own RIDs
>
> In this case, either FLR or IOMMU only resets the PF. That
> being said, VFs might be affected since PF is resetting?
> If there is an issue, I don't see it coming from the IOMMU-
> level reset..
It would still allow the ATS issue from the VF side. The VF could be
pushing an invalidation during the PF reset that will get clobbered.
I haven't fully checked but I think Linux doesn't really (easially?)
allow resetting a PF while a VF is present...
Arguably if the PF is reset the VFs should have their translations
blocked too.
Jason
next prev parent reply other threads:[~2025-08-21 13:07 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-11 22:59 [PATCH v3 0/5] Disable ATS via iommu during PCI resets Nicolin Chen
2025-08-11 22:59 ` [PATCH v3 1/5] iommu: Lock group->mutex in iommu_deferred_attach Nicolin Chen
2025-08-15 5:09 ` Baolu Lu
2025-08-15 8:27 ` Tian, Kevin
2025-08-15 8:24 ` Tian, Kevin
2025-08-15 19:26 ` Nicolin Chen
2025-08-18 14:17 ` Jason Gunthorpe
2025-08-18 17:45 ` Nicolin Chen
2025-08-18 18:09 ` Jason Gunthorpe
2025-08-18 18:29 ` Nicolin Chen
2025-08-11 22:59 ` [PATCH v3 2/5] iommu: Pass in gdev to __iommu_device_set_domain Nicolin Chen
2025-08-15 5:18 ` Baolu Lu
2025-08-15 8:29 ` Tian, Kevin
2025-08-11 22:59 ` [PATCH v3 3/5] iommu: Add iommu_get_domain_for_dev_locked() helper Nicolin Chen
2025-08-15 5:28 ` Baolu Lu
2025-08-15 18:48 ` Nicolin Chen
2025-08-18 14:40 ` Jason Gunthorpe
2025-08-19 2:09 ` Baolu Lu
2025-08-15 8:55 ` Tian, Kevin
2025-08-15 18:45 ` Nicolin Chen
2025-08-21 8:07 ` Tian, Kevin
2025-08-21 14:41 ` Nicolin Chen
2025-08-31 23:24 ` Nicolin Chen
2025-08-18 14:39 ` Jason Gunthorpe
2025-08-18 17:22 ` Nicolin Chen
2025-08-18 23:42 ` Jason Gunthorpe
2025-08-19 5:09 ` Nicolin Chen
2025-08-19 12:52 ` Jason Gunthorpe
2025-08-19 17:22 ` Nicolin Chen
2025-08-21 13:13 ` Jason Gunthorpe
2025-08-21 15:22 ` Nicolin Chen
2025-08-21 18:37 ` Jason Gunthorpe
2025-08-22 5:11 ` Nicolin Chen
2025-08-21 8:11 ` Tian, Kevin
2025-08-21 13:14 ` Jason Gunthorpe
2025-08-22 9:45 ` Tian, Kevin
2025-08-22 13:21 ` Jason Gunthorpe
2025-08-11 22:59 ` [PATCH v3 4/5] iommu: Introduce iommu_dev_reset_prepare() and iommu_dev_reset_done() Nicolin Chen
2025-08-15 5:49 ` Baolu Lu
2025-08-15 20:10 ` Nicolin Chen
2025-08-15 9:14 ` Tian, Kevin
2025-08-15 19:45 ` Nicolin Chen
2025-08-11 22:59 ` [PATCH v3 5/5] pci: Suspend iommu function prior to resetting a device Nicolin Chen
2025-08-19 14:12 ` Ethan Zhao
2025-08-19 21:59 ` Nicolin Chen
2025-08-20 3:18 ` Ethan Zhao
2025-08-22 6:14 ` Nicolin Chen
2025-08-21 13:07 ` Jason Gunthorpe [this message]
2025-08-22 6:35 ` Nicolin Chen
2025-08-22 14:08 ` Jason Gunthorpe
2025-08-22 18:50 ` Nicolin Chen
2025-08-28 12:51 ` Jason Gunthorpe
2025-08-28 15:08 ` Nicolin Chen
2025-08-28 18:46 ` Jason Gunthorpe
2025-08-28 19:35 ` Nicolin Chen
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250821130741.GL802098@nvidia.com \
--to=jgg@nvidia.com \
--cc=angelogioacchino.delregno@collabora.com \
--cc=baolu.lu@linux.intel.com \
--cc=bhelgaas@google.com \
--cc=etzhao1900@gmail.com \
--cc=helgaas@kernel.org \
--cc=iommu@lists.linux.dev \
--cc=jonathanh@nvidia.com \
--cc=joro@8bytes.org \
--cc=kevin.tian@intel.com \
--cc=lenb@kernel.org \
--cc=linux-acpi@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mediatek@lists.infradead.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=matthias.bgg@gmail.com \
--cc=nicolinc@nvidia.com \
--cc=patches@lists.linux.dev \
--cc=pjaroszynski@nvidia.com \
--cc=rafael@kernel.org \
--cc=robin.clark@oss.qualcomm.com \
--cc=robin.murphy@arm.com \
--cc=thierry.reding@gmail.com \
--cc=vdumpa@nvidia.com \
--cc=vsethi@nvidia.com \
--cc=will@kernel.org \
--cc=yi.l.liu@intel.com \
--cc=yong.wu@mediatek.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).