From: Dan Williams <dan.j.williams@intel.com>
To: <linux-coco@lists.linux.dev>, <linux-pci@vger.kernel.org>
Cc: yilun.xu@linux.intel.com, aneesh.kumar@kernel.org, aik@amd.com,
gregkh@linuxfoundation.org, "Andy Lutomirski" <luto@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Borislav Petkov" <bp@alien8.de>,
"Christoph Hellwig" <hch@lst.de>,
"Danilo Krummrich" <dakr@kernel.org>,
"Dave Hansen" <dave.hansen@linux.intel.com>,
"H. Peter Anvin" <hpa@zytor.com>,
"Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
"Ingo Molnar" <mingo@redhat.com>,
"Isaku Yamahata" <isaku.yamahata@intel.com>,
"Jason Gunthorpe" <jgg@ziepe.ca>,
"John Allen" <john.allen@amd.com>,
"Jonathan Cameron" <jonathan.cameron@huawei.com>,
"Jonathan Cameron" <Jonathan.Cameron@huawei.com>,
"Lukas Wunner" <lukas@wunner.de>,
"Marek Szyprowski" <m.szyprowski@samsung.com>,
"Peter Zijlstra" <peterz@infradead.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Robin Murphy" <robin.murphy@arm.com>,
"Roman Kisel" <romank@linux.microsoft.com>,
"Samuel Ortiz" <sameo@rivosinc.com>,
"Suzuki K Poulose" <suzuki.poulose@arm.com>,
"Thomas Gleixner" <tglx@linutronix.de>,
"Tom Lendacky" <thomas.lendacky@amd.com>,
"Xiaoyao Li" <xiaoyao.li@intel.com>
Subject: [PATCH v5 00/10] PCI/TSM: Core infrastructure for PCI device security (TDISP)
Date: Tue, 26 Aug 2025 20:51:16 -0700 [thread overview]
Message-ID: <20250827035126.1356683-1-dan.j.williams@intel.com> (raw)
Changes since v4 [1]:
- Rebased on v6.17-rc2 plus a new pci_bus_find_emul_domain_nr()
implementation after feedback from Michael
- Update all spec references to PCIe r7.0 (Bjorn)
- Alphabetize includes (Bjorn)
- Drop "_MASK" from register field definitions (Bjorn)
- Add explicit includes for used functionality (Bjorn)
- Fix some misspellings, punctuation, and capitalization (Bjorn)
- Drop whitespace out of the TDISP setup success debug print (Bjorn)
- Make the "Device 3 Extended Capability" changelog more concise (Bjorn)
- Clarify abbreviations in documentation for the IDE stream sysfs
symlink (Bjorn)
- Drop pci_ide_domain() export (Bjorn)
- Do or do not, there is no try for pci_ide_stream_enable() (Bjorn)
- Prefix register offset definitions with 0 (Jonathan)
- Rename PCI_IDE_SEL_STS_RECVD_INTEGRITY_CHECK to
PCI_IDE_SEL_STS_IDE_FAIL per latest spec (Jonathan)
- Replace call_cb_put() with scope-based-cleanup (Jonathan)
- Move the sample emulation devices to a known unused device-id, 0xffff
which is the value conveyed in an error case (Jonathan)
- Reflow line breaks in tsm_ide_stream_register() (Jonathan)
- Drop @groups passed to tsm_register() and tsm_pci_group() (Alexey)
- Simplify __sel_ide_offset() (Alexey)
- Have PCI_TSM select TSM (Alexey)
- Move DOE definitions to pci-doe.h (Alexey)
- Remove pci_tsm_doe_transfer() (Alexey)
- Reorder pci_tsm_link_constructor() to skip init actions when the
function is going to fail (Alexey)
- Rename the core 'struct pci_tsm' context as "base" (Alexey)
- Pick up Bjorn's acks
- Fix Documentation to reflect passing the name of the TSM device to
@connect and @disconnect
- Rename pci_tsm_pf0_attr_group to pci_tsm_attr_group since it will be
shared with the guest side
- Fix SRIOV function tsm sysfs init, add pci_tsm_init()
- Clarify why pci_tsm_destroy() occurs before device_del()
- Cleanup link_tsm vs devsec_tsm confusion, prepare for more devsec_tsm
enabling
- Hold pci_tsm_rwsem for write over connect and disconnect flows
- Rework "tsm" group attributes to prep for devsec_tsm attributes
- Fix find_dsm_dev() to be more careful to not walk past root ports
- Drop @sec_probe and @sec_remove add @lock and @unlock in preparation
for devsec_tsm enabling
- Require samples/devsec to be built as a module
- Fix bridge and device MMIO setup in samples/devsec/bus.c
- Move samples/devsec/bus.c to faux_device
- constify pci_ide_attr_group()
[1]: http://lore.kernel.org/20250717183358.1332417-1-dan.j.williams@intel.com
This set is available at tsm.git#staging (rebasing branch) or
tsm.git#devsec-20250826 (immutable tag). It passes a basic smoke test
that exercises load/unload of the samples/devsec/ modules and
connect/disconnect of the emulated device.
Status (further "link" vs "devsec" TSM clarity):
------------------------------------------------
The bulk of the change this round is driven by further preparation for
the "guest side" / device security state manipulation infrastructure.
I.e. the support for the PCI core within the TEE to ask the TSM to
transition a device from UNLOCKED to LOCKED, and LOCKED to RUN.
A set implementing that to be posted immediately following this with the
subject:
"PCI/TSM: TEE I/O infrastructure"
Otherwise the feedback has appeared to complete the transition from
fundamental concerns to matters of polish.
Next steps:
-----------
With "[RFC PATCH v1 00/38] ARM CCA Device Assignment support" [2] this
effort got one step closer to the criteria of "samples/devsec/ + 1
vendor implementation, or 2 vendor implementations can demonstrate the
end-to-end flow (minus attestation)" for starting the push into
mainline.
See, and review, the "PCI/TSM: TEE I/O infrastructure" posting for the
next batch of consensus building.
[2]: http://lore.kernel.org/20250728135216.48084-1-aneesh.kumar@kernel.org
Original Cover letter:
----------------------
Trusted execution environment (TEE) Device Interface Security Protocol
(TDISP) is a chapter name in the PCI specification. It describes an
alphabet soup of mechanisms, SPDM, CMA, IDE, TSM/DSM, that system
software uses to establish trust in a device and assign it to a
confidential virtual machine (CVM). It is protocol for dynamically
extending the trusted computing boundary (TCB) of a CVM with a PCI
device interface that can issue DMA to CVM private memory.
The acronym soup problem is enhanced by every major platform vendor
having distinct TEE Security Manager (TSM) API implementations /
capabilities, and to a lesser extent, every potential endpoint Device
Security Manager (DSM) having its own idiosyncratic behaviors around
TDISP state transitions.
Despite all that opportunity for differentiation, there is a significant
portion of the implementation that is cross-vendor common. However, it
is difficult to develop, debate, test and settle all those pieces absent
a low level TSM driver implementation to pull it all together.
The proposal, of which this set is the first phase, is incrementally
develop the shared infrastructure on top of a sample TSM driver
implementation to enable clean vendor agnostic discussions about the
commons. "samples/devsec/" is meant to be: just enough emulation to
exercise all the core infrastructure, a reference implementation, and a
simple unit test. The sample also enables coordination with the native
PCI device security effort [3].
[3]: http://lore.kernel.org/cover.1719771133.git.lukas@wunner.de
Dan Williams (10):
coco/tsm: Introduce a core device for TEE Security Managers
PCI/IDE: Enumerate Selective Stream IDE capabilities
PCI: Introduce pci_walk_bus_reverse(), for_each_pci_dev_reverse()
PCI/TSM: Authenticate devices via platform TSM
samples/devsec: Introduce a PCI device-security bus + endpoint sample
PCI: Add PCIe Device 3 Extended Capability enumeration
PCI/IDE: Add IDE establishment helpers
PCI/IDE: Report available IDE streams
PCI/TSM: Report active IDE streams
samples/devsec: Add sample IDE establishment
Documentation/ABI/testing/sysfs-bus-pci | 51 ++
Documentation/ABI/testing/sysfs-class-tsm | 19 +
.../ABI/testing/sysfs-devices-pci-host-bridge | 26 +
Documentation/driver-api/pci/index.rst | 1 +
Documentation/driver-api/pci/tsm.rst | 12 +
MAINTAINERS | 7 +-
drivers/base/bus.c | 38 +
drivers/pci/Kconfig | 29 +
drivers/pci/Makefile | 2 +
drivers/pci/bus.c | 38 +
drivers/pci/doe.c | 2 -
drivers/pci/ide.c | 582 ++++++++++++++
drivers/pci/pci-sysfs.c | 4 +
drivers/pci/pci.h | 19 +
drivers/pci/probe.c | 28 +-
drivers/pci/remove.c | 6 +
drivers/pci/search.c | 62 +-
drivers/pci/tsm.c | 601 ++++++++++++++
drivers/virt/coco/Kconfig | 3 +
drivers/virt/coco/Makefile | 1 +
drivers/virt/coco/tsm-core.c | 183 +++++
include/linux/device/bus.h | 3 +
include/linux/pci-doe.h | 4 +
include/linux/pci-ide.h | 72 ++
include/linux/pci-tsm.h | 143 ++++
include/linux/pci.h | 36 +
include/linux/tsm.h | 11 +
include/uapi/linux/pci_regs.h | 89 +++
samples/Kconfig | 19 +
samples/Makefile | 1 +
samples/devsec/Makefile | 10 +
samples/devsec/bus.c | 737 ++++++++++++++++++
samples/devsec/common.c | 26 +
samples/devsec/devsec.h | 40 +
samples/devsec/link_tsm.c | 242 ++++++
35 files changed, 3134 insertions(+), 13 deletions(-)
create mode 100644 Documentation/ABI/testing/sysfs-class-tsm
create mode 100644 Documentation/driver-api/pci/tsm.rst
create mode 100644 drivers/pci/ide.c
create mode 100644 drivers/pci/tsm.c
create mode 100644 drivers/virt/coco/tsm-core.c
create mode 100644 include/linux/pci-ide.h
create mode 100644 include/linux/pci-tsm.h
create mode 100644 samples/devsec/Makefile
create mode 100644 samples/devsec/bus.c
create mode 100644 samples/devsec/common.c
create mode 100644 samples/devsec/devsec.h
create mode 100644 samples/devsec/link_tsm.c
base-commit: 650d64cdd69122cc60d309f2f5fd72bbc080dbd7
--
2.50.1
next reply other threads:[~2025-08-27 3:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-27 3:51 Dan Williams [this message]
2025-08-27 3:51 ` [PATCH v5 01/10] coco/tsm: Introduce a core device for TEE Security Managers Dan Williams
2025-08-27 3:51 ` [PATCH v5 02/10] PCI/IDE: Enumerate Selective Stream IDE capabilities Dan Williams
2025-08-27 3:51 ` [PATCH v5 03/10] PCI: Introduce pci_walk_bus_reverse(), for_each_pci_dev_reverse() Dan Williams
2025-08-27 3:51 ` [PATCH v5 04/10] PCI/TSM: Authenticate devices via platform TSM Dan Williams
2025-08-27 13:25 ` Alexey Kardashevskiy
2025-08-29 1:06 ` dan.j.williams
2025-08-29 1:58 ` Alexey Kardashevskiy
2025-08-28 11:43 ` Alexey Kardashevskiy
2025-08-29 1:23 ` dan.j.williams
2025-08-30 13:26 ` Alexey Kardashevskiy
2025-09-02 15:08 ` Aneesh Kumar K.V
2025-09-03 2:03 ` Alexey Kardashevskiy
2025-09-02 15:13 ` Aneesh Kumar K.V
2025-09-03 2:07 ` Alexey Kardashevskiy
2025-09-03 2:17 ` Alexey Kardashevskiy
2025-08-27 3:51 ` [PATCH v5 05/10] samples/devsec: Introduce a PCI device-security bus + endpoint sample Dan Williams
2025-08-27 3:51 ` [PATCH v5 06/10] PCI: Add PCIe Device 3 Extended Capability enumeration Dan Williams
2025-08-27 3:51 ` [PATCH v5 07/10] PCI/IDE: Add IDE establishment helpers Dan Williams
2025-09-02 1:29 ` Alexey Kardashevskiy
2025-09-02 1:54 ` Alexey Kardashevskiy
2025-08-27 3:51 ` [PATCH v5 08/10] PCI/IDE: Report available IDE streams Dan Williams
2025-08-27 3:51 ` [PATCH v5 09/10] PCI/TSM: Report active " Dan Williams
2025-08-27 3:51 ` [PATCH v5 10/10] samples/devsec: Add sample IDE establishment Dan Williams
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250827035126.1356683-1-dan.j.williams@intel.com \
--to=dan.j.williams@intel.com \
--cc=aik@amd.com \
--cc=aneesh.kumar@kernel.org \
--cc=bhelgaas@google.com \
--cc=bp@alien8.de \
--cc=dakr@kernel.org \
--cc=dave.hansen@linux.intel.com \
--cc=gregkh@linuxfoundation.org \
--cc=hch@lst.de \
--cc=hpa@zytor.com \
--cc=ilpo.jarvinen@linux.intel.com \
--cc=isaku.yamahata@intel.com \
--cc=jgg@ziepe.ca \
--cc=john.allen@amd.com \
--cc=jonathan.cameron@huawei.com \
--cc=linux-coco@lists.linux.dev \
--cc=linux-pci@vger.kernel.org \
--cc=lukas@wunner.de \
--cc=luto@kernel.org \
--cc=m.szyprowski@samsung.com \
--cc=mingo@redhat.com \
--cc=peterz@infradead.org \
--cc=rafael@kernel.org \
--cc=robin.murphy@arm.com \
--cc=romank@linux.microsoft.com \
--cc=sameo@rivosinc.com \
--cc=suzuki.poulose@arm.com \
--cc=tglx@linutronix.de \
--cc=thomas.lendacky@amd.com \
--cc=xiaoyao.li@intel.com \
--cc=yilun.xu@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).