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From: hans.zhang@cixtech.com
To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
	mani@kernel.org, robh@kernel.org, kwilczynski@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org
Cc: mpillai@cadence.com, fugang.duan@cixtech.com,
	guoyin.chen@cixtech.com, peter.chen@cixtech.com,
	cix-kernel-upstream@cixtech.com, linux-pci@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	Hans Zhang <hans.zhang@cixtech.com>
Subject: [PATCH v9 14/14] arm64: dts: cix: Enable PCIe on the Orion O6 board
Date: Mon,  1 Sep 2025 17:20:52 +0800	[thread overview]
Message-ID: <20250901092052.4051018-15-hans.zhang@cixtech.com> (raw)
In-Reply-To: <20250901092052.4051018-1-hans.zhang@cixtech.com>

From: Hans Zhang <hans.zhang@cixtech.com>

Add PCIe RC support on Orion O6 board.

The Orion O6 board includes multiple PCIe root complexes. The current
device tree configuration enables detection and basic operation of PCIe
endpoints on this platform.

GPIO and pinctrl subsystems for this platform are not yet ready for
upstream inclusion. Consequently, attributes such as reset-gpios and
pinctrl configurations are temporarily omitted from the PCIe node
definitions.

Endpoint detection and functionality are confirmed to be operational with
this basic configuration. The missing GPIO and pinctrl support will be
added incrementally in future patches as the dependent subsystems become
available upstream.

Signed-off-by: Hans Zhang <hans.zhang@cixtech.com>
---
Dear Krzysztof and Mani,

Due to the fact that the GPIO, PINCTRL and other modules of our platform are
not yet ready for upstream. Attributes that PCIe depends on, such as reset-gpios
and pinctrl*, have not been added for the time being. It will be added gradually
in the future.

The following are Arnd's previous comments. We can go to upsteam separately.
https://lore.kernel.org/all/422deb4d-db29-48c1-b0c9-7915951df500@app.fastmail.com/


The following are the situations of five PCIe controller enumeration devices.

root@cix-localhost:~# lspci
0000:c0:00.0 PCI bridge: Device 1f6c:0001
0000:c1:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. Device 8126 (rev 01)
0001:90:00.0 PCI bridge: Device 1f6c:0001
0001:91:00.0 Non-Volatile memory controller: Samsung Electronics Co Ltd NVMe SSD Controller S4LV008[Pascal]
0002:60:00.0 PCI bridge: Device 1f6c:0001
0002:61:00.0 Network controller: Realtek Semiconductor Co., Ltd. RTL8852BE PCIe 802.11ax Wireless Network Controller
0003:00:00.0 PCI bridge: Device 1f6c:0001
0003:01:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. Device 8126 (rev 01)
0004:30:00.0 PCI bridge: Device 1f6c:0001
0004:31:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. Device 8126 (rev 01)
root@cix-localhost:~#
root@cix-localhost:~# uname -a
Linux cix-localhost 6.17.0-rc4-00014-g9549fcfa35ad #204 SMP PREEMPT Mon Sep  1 16:18:41 CST 2025 aarch64 GNU/Linux
---
 arch/arm64/boot/dts/cix/sky1-orion-o6.dts | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
index d74964d53c3b..be3ec4f5d11e 100644
--- a/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
+++ b/arch/arm64/boot/dts/cix/sky1-orion-o6.dts
@@ -34,6 +34,26 @@ linux,cma {
 
 };
 
+&pcie_x8_rc {
+	status = "okay";
+};
+
+&pcie_x4_rc {
+	status = "okay";
+};
+
+&pcie_x2_rc {
+	status = "okay";
+};
+
+&pcie_x1_0_rc {
+	status = "okay";
+};
+
+&pcie_x1_1_rc {
+	status = "okay";
+};
+
 &uart2 {
 	status = "okay";
 };
-- 
2.49.0


      parent reply	other threads:[~2025-09-01  9:21 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-01  9:20 [PATCH v9 00/14] Enhance the PCIe controller driver for next generation controllers hans.zhang
2025-09-01  9:20 ` [PATCH v9 01/14] PCI: cadence: Add module support for platform controller driver hans.zhang
2025-09-01  9:20 ` [PATCH v9 02/14] PCI: cadence: Split PCIe controller header file hans.zhang
2025-09-01  9:20 ` [PATCH v9 03/14] PCI: cadence: Add register definitions for High Perf Architecture (HPA) hans.zhang
2025-09-01  9:20 ` [PATCH v9 04/14] PCI: cadence: Add helper functions for supporting " hans.zhang
2025-09-01  9:20 ` [PATCH v9 05/14] PCI: cadence: Move PCIe EP common functions to a separate file hans.zhang
2025-09-01  9:20 ` [PATCH v9 06/14] PCI: cadence: Move PCIe RP " hans.zhang
2025-09-01  9:20 ` [PATCH v9 07/14] PCI: cadence: Add support for High Perf Architecture (HPA) controller hans.zhang
2025-09-01  9:20 ` [PATCH v9 08/14] PCI: cadence: Update PCIe platform to use register offsets passed hans.zhang
2025-09-01  9:20 ` [PATCH v9 09/14] dt-bindings: PCI: Add CIX Sky1 PCIe Root Complex bindings hans.zhang
2025-09-01  9:20 ` [PATCH v9 10/14] PCI: Add Cix Technology Vendor and Device ID hans.zhang
2025-09-01  9:20 ` [PATCH v9 11/14] PCI: sky1: Add PCIe host support for CIX Sky1 hans.zhang
2025-09-01  9:20 ` [PATCH v9 12/14] MAINTAINERS: add entry for CIX Sky1 PCIe driver hans.zhang
2025-09-01  9:20 ` [PATCH v9 13/14] arm64: dts: cix: Add PCIe Root Complex on sky1 hans.zhang
2025-09-01  9:20 ` hans.zhang [this message]

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