From: Bjorn Helgaas <helgaas@kernel.org>
To: Manivannan Sadhasivam <mani@kernel.org>
Cc: manivannan.sadhasivam@oss.qualcomm.com,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org,
"David E. Box" <david.e.box@linux.intel.com>,
"Kai-Heng Feng" <kai.heng.feng@canonical.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
"Heiner Kallweit" <hkallweit1@gmail.com>,
"Chia-Lin Kao" <acelan.kao@canonical.com>
Subject: Re: [PATCH 1/2] PCI/ASPM: Override the ASPM and Clock PM states set by BIOS for devicetree platforms
Date: Wed, 17 Sep 2025 06:22:18 -0500 [thread overview]
Message-ID: <20250917112218.GA1844955@bhelgaas> (raw)
In-Reply-To: <frmzvhnhljy23xds7lnmo23zg35wxpzu4pvabnc6v6vz7qn2lj@gk25cglbpn3q>
[+cc Kai-Heng, Rafael, Heiner, AceLan; response to
https://lore.kernel.org/r/20250916-pci-dt-aspm-v1-1-778fe907c9ad@oss.qualcomm.com]
On Wed, Sep 17, 2025 at 04:14:42PM +0530, Manivannan Sadhasivam wrote:
> On Tue, Sep 16, 2025 at 12:15:46PM GMT, Bjorn Helgaas wrote:
> > On Tue, Sep 16, 2025 at 09:42:52PM +0530, Manivannan Sadhasivam via B4 Relay wrote:
> > > So far, the PCI subsystem has honored the ASPM and Clock PM states set by
> > > the BIOS (through LNKCTL) during device initialization. This was done
> > > conservatively to avoid issues with the buggy devices that advertise
> > > ASPM capabilities, but behave erratically if the ASPM states are enabled.
> > > So the PCI subsystem ended up trusting the BIOS to enable only the ASPM
> > > states that were known to work for the devices.
> ...
> > For debuggability, I wonder if we should have a pci_dbg() at the point
> > where we actually update PCI_EXP_LNKCTL, PCI_L1SS_CTL1, etc? I could
> > even argue for pci_info() since this should be a low-frequency and
> > relatively high-risk event.
>
> I don't know why we should print register settings since we are explicitly
> printing out what states are getting enabled.
My thinking here is that we care about is what is actually written to
the device, not what we *intend* to write to the device.
There's a lot of complicated aspm.c code between setting
link->clkpm_default/aspm_default and actually programming the device,
and when debugging a problem, I don't want to have to parse all that
code to derive the register values.
next prev parent reply other threads:[~2025-09-17 11:22 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-16 16:12 [PATCH 0/2] PCI/ASPM: Enable ASPM and Clock PM by default on devicetree platforms Manivannan Sadhasivam via B4 Relay
2025-09-16 16:12 ` [PATCH 1/2] PCI/ASPM: Override the ASPM and Clock PM states set by BIOS for " Manivannan Sadhasivam via B4 Relay
2025-09-16 16:28 ` Konrad Dybcio
2025-09-17 10:27 ` Manivannan Sadhasivam
2025-09-16 17:15 ` Bjorn Helgaas
2025-09-17 10:44 ` Manivannan Sadhasivam
2025-09-17 11:22 ` Bjorn Helgaas [this message]
2025-09-17 13:03 ` Manivannan Sadhasivam
2025-09-22 15:53 ` Manivannan Sadhasivam
2025-09-16 16:12 ` [PATCH 2/2] PCI: qcom: Remove the custom ASPM enablement code Manivannan Sadhasivam via B4 Relay
2025-09-16 17:21 ` [PATCH 0/2] PCI/ASPM: Enable ASPM and Clock PM by default on devicetree platforms Bjorn Helgaas
2025-09-16 20:25 ` Bjorn Helgaas
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