[PATCH] PCI: xilinx-xdma: Enable legacy interrupts

[Ravi Kumar Bandi <ravib@amazon.com>]

Starting with kernel 6.6.0, legacy interrupts from PCIe endpoints
do not flow through the Xilinx XDMA root port bridge because
interrupts are not enabled after initializing the port.

This issue is seen after XDMA driver received support for QDMA and
underwent relevant code restructuring of old xdma-pl driver to
xilinx-dma-pl (ref commit: 8d786149d78c).

This patch re-enables legacy interrupts to use with PCIe endpoints
with legacy interrupts. Tested the fix on a board with two endpoints
generating legacy interrupts. Interrupts are properly detected and
serviced. The /proc/interrupts output shows:
[...]
32:        320          0  pl_dma:RC-Event  16 Level     400000000.axi-pcie, azdrv
52:        470          0  pl_dma:RC-Event  16 Level     500000000.axi-pcie, azdrv
[...]

Signed-off-by: Ravi Kumar Bandi <ravib@amazon.com>
---
 drivers/pci/controller/pcie-xilinx-dma-pl.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/pci/controller/pcie-xilinx-dma-pl.c b/drivers/pci/controller/pcie-xilinx-dma-pl.c
index b037c8f315e4..cc539292d10a 100644
--- a/drivers/pci/controller/pcie-xilinx-dma-pl.c
+++ b/drivers/pci/controller/pcie-xilinx-dma-pl.c
@@ -659,6 +659,12 @@ static int xilinx_pl_dma_pcie_setup_irq(struct pl_dma_pcie *port)
 		return err;
 	}
 
+	/* Enable interrupts */
+	pcie_write(port, XILINX_PCIE_DMA_IMR_ALL_MASK,
+		   XILINX_PCIE_DMA_REG_IMR);
+	pcie_write(port, XILINX_PCIE_DMA_IDRN_MASK,
+		   XILINX_PCIE_DMA_REG_IDRN_MASK);
+
 	return 0;
 }
 
-- 
2.47.3