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From: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
To: "Bjorn Helgaas" <bhelgaas@google.com>,
	"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
	"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
	"Manivannan Sadhasivam" <mani@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Abraham I" <kishon@kernel.org>,
	"Bjorn Andersson" <andersson@kernel.org>,
	"Krishna Chaitanya Chundru" <krishna.chundru@oss.qualcomm.com>
Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
	 linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	 Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>,
	 Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>,
	 Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Subject: [PATCH 0/3] PCI: qcom: Binding fix
Date: Fri, 10 Oct 2025 11:25:46 -0700	[thread overview]
Message-ID: <20251010-pci-binding-v1-0-947c004b5699@oss.qualcomm.com> (raw)

Hi,

This series fixes the binding issue around the PERST# and PHY properties.
The binding issue was reported in [1], while discussing a DTS fix [2].

The binding fix provided in this series is not sufficient enough to spot all the
shenanigans, especially keeping one property in Controller node and another in
Root Port node. But this series does catch the DTS issue fixed by [2]:

arch/arm64/boot/dts/qcom/sm8750-mtp.dtb: pcie@1c00000 (qcom,pcie-sm8750): 'oneOf' conditional failed, one must be fixed:
	'phys' is a required property
	False schema does not allow [[148, 102, 1]]
	False schema does not allow [[148, 104, 0]]
	from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8550.yaml#
arch/arm64/boot/dts/qcom/sm8750-mtp.dtb: pcie@1c00000 (qcom,pcie-sm8750): pcie@0: 'oneOf' conditional failed, one must be fixed:
	'reset-gpios' is a required property
	'wake-gpios' is a required property
	False schema does not allow [[34]]
	from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8550.yaml#
arch/arm64/boot/dts/qcom/sm8750-mtp.dtb: pcie@1c00000 (qcom,pcie-sm8750): Unevaluated properties are not allowed ('#address-cells', '#interrupt-cells', '#size-cells', 'bus-range', 'device_type', 'dma-coherent', 'interconnect-names', 'interconnects', 'interrupt-map', 'interrupt-map-mask', 'iommu-map', 'linux,pci-domain', 'msi-map', 'msi-map-mask', 'num-lanes', 'operating-points-v2', 'opp-table', 'pcie@0', 'perst-gpios', 'power-domains', 'ranges', 'wake-gpios' were unexpected)
	from schema $id: http://devicetree.org/schemas/pci/qcom,pcie-sm8550.yaml#

Thanks to Dmitry for suggesting the binding fix!

[1] https://lore.kernel.org/linux-pci/8f2e0631-6c59-4298-b36e-060708970ced@oss.qualcomm.com
[2] https://lore.kernel.org/all/20251008-sm8750-v1-1-daeadfcae980@oss.qualcomm.com

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
---
Manivannan Sadhasivam (3):
      dt-bindings: PCI: Update the email address for Manivannan Sadhasivam
      dt-bindings: PCI: qcom: Enforce check for PHY, PERST# and WAKE# properties
      PCI: qcom: Treat PHY and PERST# as optional for the new binding

 Documentation/devicetree/bindings/pci/pci-ep.yaml  |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-common.yaml  | 22 +++++++++++++++++++++-
 .../devicetree/bindings/pci/qcom,pcie-ep.yaml      |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sa8255p.yaml |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sa8775p.yaml |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sc7280.yaml  |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sc8180x.yaml |  2 +-
 .../bindings/pci/qcom,pcie-sc8280xp.yaml           |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sm8150.yaml  |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sm8250.yaml  |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sm8350.yaml  |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sm8450.yaml  |  2 +-
 .../devicetree/bindings/pci/qcom,pcie-sm8550.yaml  |  2 +-
 .../bindings/pci/qcom,pcie-x1e80100.yaml           |  2 +-
 .../devicetree/bindings/pci/qcom,pcie.yaml         |  2 +-
 drivers/pci/controller/dwc/pcie-qcom.c             | 11 +++++++++--
 16 files changed, 44 insertions(+), 17 deletions(-)
---
base-commit: 5472d60c129f75282d94ae5ad072ee6dfb7c7246
change-id: 20251010-pci-binding-7d4d7799c6ed

Best regards,
-- 
Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>


             reply	other threads:[~2025-10-10 18:26 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-10 18:25 Manivannan Sadhasivam [this message]
2025-10-10 18:25 ` [PATCH 1/3] dt-bindings: PCI: Update the email address for Manivannan Sadhasivam Manivannan Sadhasivam
2025-10-15 12:43   ` Rob Herring (Arm)
2025-10-10 18:25 ` [PATCH 2/3] dt-bindings: PCI: qcom: Enforce check for PHY, PERST# and WAKE# properties Manivannan Sadhasivam
2025-10-10 18:28   ` Konrad Dybcio
2025-10-10 19:33   ` Rob Herring (Arm)
2025-10-11  4:10     ` Manivannan Sadhasivam
2025-10-10 18:25 ` [PATCH 3/3] PCI: qcom: Treat PHY and PERST# as optional for the new binding Manivannan Sadhasivam
2025-10-10 18:32   ` Konrad Dybcio
2025-10-11  4:09     ` Manivannan Sadhasivam
2025-10-13  9:43       ` Bartosz Golaszewski
2025-10-13 14:40       ` Krishna Chaitanya Chundru
2025-10-26 15:57 ` (subset) [PATCH 0/3] PCI: qcom: Binding fix Manivannan Sadhasivam

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