From: Alex Williamson <alex@shazbot.org>
To: ALOK TIWARI <alok.a.tiwari@oracle.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
donald.d.dugger@intel.com, linux-pci@vger.kernel.org
Subject: Re: [QUERY] Is there a reason pci_quirk_enable_intel_rp_mpc_acs() uses pci_write_config_word()
Date: Tue, 14 Oct 2025 13:56:58 -0600 [thread overview]
Message-ID: <20251014135658.1afeff57@shazbot.org> (raw)
In-Reply-To: <67958fbe-fa61-4ea4-8040-c6b8d0313d57@oracle.com>
On Tue, 14 Oct 2025 10:57:39 +0530
ALOK TIWARI <alok.a.tiwari@oracle.com> wrote:
> Hi,
>
> function pci_quirk_enable_intel_rp_mpc_acs() in
> drivers/pci/quirks.c, I noticed that the code reads a 32-bit value from
> INTEL_MPC_REG using pci_read_config_dword(), but writes it back using
> pci_write_config_word().
>
> The relevant lines are:
>
> pci_read_config_dword(dev, INTEL_MPC_REG, &mpc);
> if (!(mpc & INTEL_MPC_REG_IRBNCE)) {
> pci_info(dev, "Enabling MPC IRBNCE\n");
> mpc |= INTEL_MPC_REG_IRBNCE;
> pci_write_config_word(dev, INTEL_MPC_REG, mpc);
> }
>
> Given that:
> /* Miscellaneous Port Configuration register */
> #define INTEL_MPC_REG 0xd8
> /* MPC: Invalid Receive Bus Number Check Enable */
> #define INTEL_MPC_REG_IRBNCE (1 << 26)
>
> the IRBNCE bit is in the upper 16 bits of this 32-bit register.
> It seems that using pci_write_config_word() would not actually update
> that bit.
>
> is there a specific hardware reason for using a 16-bit write?
It looks like a typo to me. Please post a formal fix. Thanks,
Alex
> ---
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 214ed060ca1b..1bd6e70058b5 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -5312,7 +5312,7 @@ static void
> pci_quirk_enable_intel_rp_mpc_acs(struct pci_dev *dev)
> if (!(mpc & INTEL_MPC_REG_IRBNCE)) {
> pci_info(dev, "Enabling MPC IRBNCE\n");
> mpc |= INTEL_MPC_REG_IRBNCE;
> - pci_write_config_word(dev, INTEL_MPC_REG, mpc);
> + pci_write_config_dword(dev, INTEL_MPC_REG, mpc);
> }
> }
>
prev parent reply other threads:[~2025-10-14 19:57 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-14 5:27 [QUERY] Is there a reason pci_quirk_enable_intel_rp_mpc_acs() uses pci_write_config_word() ALOK TIWARI
2025-10-14 19:56 ` Alex Williamson [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251014135658.1afeff57@shazbot.org \
--to=alex@shazbot.org \
--cc=alok.a.tiwari@oracle.com \
--cc=bhelgaas@google.com \
--cc=donald.d.dugger@intel.com \
--cc=linux-pci@vger.kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).