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Sat, 18 Oct 2025 22:00:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG2GCOUQgg388o06Q5JSqBle/dvEc3Un/4442RGMFaboTta85NJv6+LnGnnuvBC07NDv3meCA== X-Received: by 2002:ac8:5ad0:0:b0:4e8:aee7:c559 with SMTP id d75a77b69052e-4e8aee7c85cmr47240031cf.31.1760850008184; Sat, 18 Oct 2025 22:00:08 -0700 (PDT) Received: from mira.orion.internal ([2607:f2c0:b0fc:be00:3640:bdf5:7a8:2136]) by smtp.gmail.com with ESMTPSA id 6a1803df08f44-87d028ad781sm27154396d6.49.2025.10.18.22.00.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Oct 2025 22:00:07 -0700 (PDT) From: Peter Colberg To: Danilo Krummrich , Miguel Ojeda , Alex Gaynor Cc: Bjorn Helgaas , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Boqun Feng , Gary Guo , =?UTF-8?q?Bj=C3=B6rn=20Roy=20Baron?= , Benno Lossin , Andreas Hindborg , Alice Ryhl , Trevor Gross , linux-pci@vger.kernel.org, rust-for-linux@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Colberg , Bjorn Helgaas Subject: [PATCH 2/2] rust: pci: normalise spelling of PCI BAR Date: Sun, 19 Oct 2025 04:56:20 +0000 Message-ID: <20251019045620.2080-3-pcolberg@redhat.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251019045620.2080-1-pcolberg@redhat.com> References: <20251019045620.2080-1-pcolberg@redhat.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Consistently refer to PCI base address register as PCI BAR. Fix spelling mistake "Mapps" -> "Maps". Link: https://lore.kernel.org/rust-for-linux/20251015225827.GA960157@bhelgaas/ Link: https://github.com/Rust-for-Linux/linux/issues/1196 Suggested-by: Bjorn Helgaas Signed-off-by: Peter Colberg --- rust/kernel/pci.rs | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index 18f9b92a745e..747a0487d1e5 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -363,7 +363,7 @@ pub struct Device( /// # Invariants /// /// `Bar` always holds an `IoRaw` inststance that holds a valid pointer to the start of the I/O -/// memory mapped PCI bar and its size. +/// memory mapped PCI BAR and its size. pub struct Bar { pdev: ARef, io: IoRaw, @@ -423,7 +423,7 @@ fn new(pdev: &Device, num: u32, name: &CStr) -> Result { /// # Safety /// - /// `ioptr` must be a valid pointer to the memory mapped PCI bar number `num`. + /// `ioptr` must be a valid pointer to the memory mapped PCI BAR number `num`. unsafe fn do_release(pdev: &Device, ioptr: usize, num: i32) { // SAFETY: // `pdev` is valid by the invariants of `Device`. @@ -537,7 +537,7 @@ pub fn subsystem_device_id(&self) -> u16 { unsafe { (*self.as_raw()).subsystem_device } } - /// Returns the start of the given PCI bar resource. + /// Returns the start of the given PCI BAR resource. pub fn resource_start(&self, bar: u32) -> Result { if !Bar::index_is_valid(bar) { return Err(EINVAL); @@ -549,7 +549,7 @@ pub fn resource_start(&self, bar: u32) -> Result { Ok(unsafe { bindings::pci_resource_start(self.as_raw(), bar.try_into()?) }) } - /// Returns the size of the given PCI bar resource. + /// Returns the size of the given PCI BAR resource. pub fn resource_len(&self, bar: u32) -> Result { if !Bar::index_is_valid(bar) { return Err(EINVAL); @@ -656,7 +656,7 @@ fn drop(&mut self) { } impl Device { - /// Mapps an entire PCI-BAR after performing a region-request on it. I/O operation bound checks + /// Maps an entire PCI BAR after performing a region-request on it. I/O operation bound checks /// can be performed on compile time for offsets (plus the requested type size) < SIZE. pub fn iomap_region_sized<'a, const SIZE: usize>( &'a self, @@ -666,7 +666,7 @@ pub fn iomap_region_sized<'a, const SIZE: usize>( Devres::new(self.as_ref(), Bar::::new(self, bar, name)) } - /// Mapps an entire PCI-BAR after performing a region-request on it. + /// Maps an entire PCI BAR after performing a region-request on it. pub fn iomap_region<'a>( &'a self, bar: u32, -- 2.51.0