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a=openpgp-sha256; l=3581; i=manivannan.sadhasivam@oss.qualcomm.com; h=from:subject:message-id; bh=Gdnp6jYIXA7d23ypy6BccSCLfEp5aevtpcimBZd6xFk=; b=owEBbQGS/pANAwAKAVWfEeb+kc71AcsmYgBpDrexLthZW1QbVwJ+5bGWI3fkrcZNliIDoJvKd gUglQuBXF2JATMEAAEKAB0WIQRnpUMqgUjL2KRYJ5dVnxHm/pHO9QUCaQ63sQAKCRBVnxHm/pHO 9d9QB/9FD3dsNu0uaPnLM0yo7EQwcEweLwyFi/H0JtF4U7Isg2qKBsDzXaybv0pAM/xxclG4Svm 7xP3Yy8/GxiBj0a6cqq3lOsAVqp0Rj5V6ZcVqLrT5j7+42doHx94jNfe2fkpv1eWfixAV6yMYQb 3XtTkboarpDsg0xc30ucNgzDxVl9b2FYwQ7l4aP+HUWse5t1TxRn+1fzvCB4g7QUShFIA0WVpwk YyG59vG9twBP+N/nuzTSt5Vf1I9iwRJec3DHMNPgT9QM+5HbKbChohzFuSgSKNzEFfsgowud8VN XIEaQkMknmT/QPYHykAKaZkC9C6A0LaFipVcUPaYg6S933AH X-Developer-Key: i=manivannan.sadhasivam@oss.qualcomm.com; a=openpgp; fpr=C668AEC3C3188E4C611465E7488550E901166008 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTA4MDAyNyBTYWx0ZWRfXzm5Mpv+iygw2 mxh5KVbvo61Vwz+IsVy4cvdxgyxhijZQtSOlqnrSmmGulaCMVuwjHcO3dtwqrSknRB3lAxV6Wl8 Ds1173nqhn0qSiQM2G2JgGHMlckNoyKiTNMxnhndG671xZY/acddDgv92al6I/Ajhn+ye5QGv0C WnnzpYypwN95XomF4YIA71ZX0RujLXhkre4rjyJnL9AOwYlTL6DUUIICCaQEXuo6zsLLrTWMMz5 dMvnEZ4UYpealDkNoJG6NgWrjtr4dZ2Yk0XsfpIyLdQf+49kBtg/FDhAGuMUUmSKXlJ3bq6j7mQ 7SoUPt/aQzPYDLtPKzMWa95fCnafgvm6inD7tYWnB5yyRt6Aqmbe63kJ9a7IrfPfEfbbW99IZUh /FvpNjHhpEOWdSNyKowOXk6LBAH8eA== X-Proofpoint-GUID: Pkv_3-s0DXolGZ0MnaScIqVn1Gp3r90z X-Proofpoint-ORIG-GUID: Pkv_3-s0DXolGZ0MnaScIqVn1Gp3r90z X-Authority-Analysis: v=2.4 cv=IcuKmGqa c=1 sm=1 tr=0 ts=690eb7bd cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=qronr9GGDLuyXDLutoyxMA==:17 a=IkcTkHD0fZMA:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=NEAV23lmAAAA:8 a=EUspDBNiAAAA:8 a=3P-LAdjlN1q_Sw6-dOgA:9 a=QEXdDO2ut3YA:10 a=324X-CrmTo6CU4MGRt3R:22 a=HhbK4dLum7pmb74im6QT:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-08_01,2025-11-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 bulkscore=0 suspectscore=0 spamscore=0 priorityscore=1501 phishscore=0 clxscore=1015 impostorscore=0 adultscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511080027 Hi, This series is an initial attempt to support the PCIe M.2 connectors in the kernel and devicetree binding. The PCIe M.2 connectors as defined in the PCI Express M.2 Specification are widely used in Notebooks/Tablet form factors (even in PCs). On the ACPI platforms, power to these connectors are mostly handled by the firmware/BIOS and the kernel never bothered to directly power manage them as like other PCIe connectors. But on the devicetree platforms, the kernel needs to power manage these connectors with the help of the devicetree description. But so far, there is no proper representation of the M.2 connectors in devicetree binding. This forced the developers to fake the M.2 connectors as PMU nodes [1] and fixed regulators in devicetree. So to properly support the M.2 connectors in devicetree platforms, this series introduces the devicetree binding for Mechanical Key M connector as an example and also the corresponding pwrseq driver and PCI changes in kernel to driver the connector. The Mechanical Key M connector is used to connect SSDs to the host machine over PCIe/SATA interfaces. Due to the hardware constraints, this series only adds support for driving the PCIe interface of the connector in the kernel. Also, the optional interfaces supported by the Key M connectors are not supported in the driver and left for the future enhancements. Future work =========== I'm planning to submit the follow-up series to add support for the Mechanical Key A connector for connecting the WiFI/BT cards, once some initial review happens on this series. Testing ======= This series, together with the devicetree changes [2] [3] were tested on the Qualcomm X1e based Lenovo Thinkpad T14s Laptop which has the NVMe SSD connected over PCIe. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts?h=v6.18-rc4&id=d09ab685a8f51ba412d37305ea62628a01cbea57 [2] https://github.com/Mani-Sadhasivam/linux/commit/8f1d17c01a0d607a36e19c6d9f7fc877226ba315 [3] https://github.com/Mani-Sadhasivam/linux/commit/0b1f14a18db2a04046ad6af40e94984166c78fbc Signed-off-by: Manivannan Sadhasivam --- Changes in v2: - Incorporated comments from Bartosz and Frank for pwrseq and dt-binding patches, especially adding the pwrseq match() code. - Link to v1: https://lore.kernel.org/r/20251105-pci-m2-v1-0-84b5f1f1e5e8@oss.qualcomm.com --- Manivannan Sadhasivam (4): dt-bindings: connector: Add PCIe M.2 Mechanical Key M connector PCI/pwrctrl: Add support for handling PCIe M.2 connectors PCI/pwrctrl: Create pwrctrl device if the graph port is found power: sequencing: Add the Power Sequencing driver for the PCIe M.2 connectors .../bindings/connector/pcie-m2-m-connector.yaml | 122 +++++++++++++++ MAINTAINERS | 7 + drivers/pci/probe.c | 3 +- drivers/pci/pwrctrl/Kconfig | 1 + drivers/pci/pwrctrl/slot.c | 35 ++++- drivers/power/sequencing/Kconfig | 8 + drivers/power/sequencing/Makefile | 1 + drivers/power/sequencing/pwrseq-pcie-m2.c | 163 +++++++++++++++++++++ 8 files changed, 334 insertions(+), 6 deletions(-) --- base-commit: 3a8660878839faadb4f1a6dd72c3179c1df56787 change-id: 20251103-pci-m2-7633631b6faa Best regards, -- Manivannan Sadhasivam