From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EB70035CBCB; Tue, 11 Nov 2025 22:16:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762899399; cv=none; b=jefv4Opdzog5ArQ1+0U+2lVSXTYxg6vfWcU5uveyyWgpVzTuNW/ElyjKR8SMbwmtgxi+OyJXSZAxei734xjrnFNUrynrWwTwloiB6JM3GCHegrjv7zvmgJVsGEjEq/4tajJOINHs8fc79BpYiHl4fBUxg1UM/FGaudN8VMz1tOc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762899399; c=relaxed/simple; bh=piP/RwbPgLfG2R/w3aecdxfRCWSEvz8vScqdpVTga7c=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Zuk+L6bm2f4lBzl4Ue9ZkgShrbo007oIYueAhM8hdUEhDo25byIC/4h0KJ8M2TszUI128EhIgMSYOHYjdHG8jeUBtQsZcIthkTET21gwMabRIVnhAPxfCnxccxiTiAgtAV0yv+VZXz5Hh8rcmT1s8V5VNVzvWcBrz/a/9G4meeU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=eJ6ZSNET; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="eJ6ZSNET" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 58FDCC4CEF5; Tue, 11 Nov 2025 22:16:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1762899398; bh=piP/RwbPgLfG2R/w3aecdxfRCWSEvz8vScqdpVTga7c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eJ6ZSNETJMT92b3zYiGiIx7Ydvvs0kleK7C5qXbMjuOSuCW+VZK3Ls8jgstesTrWS yMADIldoLS/F5KrHgBeUm0uRcWt1rEuchfK9XmapNz2TF/Kz9a20CdqUr7FI8QNRAK 88Nd8SbgCjY86c5xj4Dt8I8Mx1w9Nkg9tyOTl0MBxbYxbahx4qTMMb65q6xQz3HOt3 zZtDJDqD5GYpsKvdB3/pssXrn9lYmP3eTYOq9k80N00IQFq/66K4CWAZ6V/ItqVBpC 0DHFhiQD28+i1OvetrcVrXaylERxY3DNUFQq87ZSy3Zz8fApA+UZEB2WLG542UPJGE 6nakGzrXOfMmw== From: Bjorn Helgaas To: Niklas Cassel , Shawn Lin Cc: Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , Heiko Stuebner , Kever Yang , Simon Xue , Damien Le Moal , Dragan Simic , FUKAUMI Naoki , Diederik de Haas , Richard Zhu , Frank Li , Lucas Stach , Shawn Guo , Sascha Hauer , Fabio Estevam , Conor Dooley , Krzysztof Kozlowski , Thierry Reding , Jonathan Hunter , Hans Zhang , linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, kernel@pengutronix.de, Bjorn Helgaas Subject: [PATCH 4/4] arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1 Date: Tue, 11 Nov 2025 16:16:11 -0600 Message-ID: <20251111221621.2208606-5-helgaas@kernel.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251111221621.2208606-1-helgaas@kernel.org> References: <20251111221621.2208606-1-helgaas@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit From: Shawn Lin Add supports-clkreq and pinmux for PCIe ASPM L1 substates. Signed-off-by: Shawn Lin Signed-off-by: Bjorn Helgaas Reviewed-by: Hans Zhang Acked-by: Manivannan Sadhasivam Link: https://patch.msgid.link/1761187883-150120-2-git-send-email-shawn.lin@rock-chips.com --- arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts index ff1ba5ed56ef..c9d284cb738b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts @@ -522,6 +522,7 @@ &pcie2x1l0 { pinctrl-names = "default"; pinctrl-0 = <&pcie2_0_rst>, <&pcie2_0_wake>, <&pcie2_0_clkreq>, <&wifi_host_wake_irq>; reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; + supports-clkreq; vpcie3v3-supply = <&vcc3v3_wlan>; status = "okay"; @@ -545,7 +546,8 @@ wifi: wifi@0,0 { &pcie2x1l1 { reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; - pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>; + pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>, <&pcie30x1m1_1_clkreqn>; + supports-clkreq; status = "okay"; }; @@ -555,7 +557,8 @@ &pcie30phy { &pcie3x4 { pinctrl-names = "default"; - pinctrl-0 = <&pcie3_reset>; + pinctrl-0 = <&pcie3_reset>, <&pcie30x4m1_clkreqn>; + supports-clkreq; reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie30>; status = "okay"; -- 2.43.0