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From: Zhi Wang <zhiw@nvidia.com>
To: Joel Fernandes <joelagnelf@nvidia.com>
Cc: <rust-for-linux@vger.kernel.org>, <linux-pci@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <dakr@kernel.org>,
	<aliceryhl@google.com>, <bhelgaas@google.com>,
	<kwilczynski@kernel.org>, <ojeda@kernel.org>,
	<alex.gaynor@gmail.com>, <boqun.feng@gmail.com>,
	<gary@garyguo.net>, <bjorn3_gh@protonmail.com>,
	<lossin@kernel.org>, <a.hindborg@kernel.org>, <tmgross@umich.edu>,
	<markus.probst@posteo.de>, <helgaas@kernel.org>,
	<cjia@nvidia.com>, <smitra@nvidia.com>, <ankita@nvidia.com>,
	<aniketa@nvidia.com>, <kwankhede@nvidia.com>,
	<targupta@nvidia.com>, <acourbot@nvidia.com>,
	<jhubbard@nvidia.com>, <zhiwang@kernel.org>
Subject: Re: [PATCH v6 RESEND 6/7] rust: pci: add config space read/write support
Date: Mon, 17 Nov 2025 22:28:06 +0200	[thread overview]
Message-ID: <20251117222806.49d1a13d.zhiw@nvidia.com> (raw)
In-Reply-To: <20251114002005.GA2384907@joelbox2>

On Thu, 13 Nov 2025 19:20:05 -0500
Joel Fernandes <joelagnelf@nvidia.com> wrote:

> Hi Zhi,
> 
> On Mon, Nov 10, 2025 at 10:41:18PM +0200, Zhi Wang wrote:
> [..]  
> >  impl Device<device::Core> {
> > diff --git a/rust/kernel/pci/io.rs b/rust/kernel/pci/io.rs
> > index 2bbb3261198d..bb78a83fe92c 100644
> > --- a/rust/kernel/pci/io.rs
> > +++ b/rust/kernel/pci/io.rs
> > @@ -2,12 +2,19 @@
> >  
> >  //! PCI memory-mapped I/O infrastructure.
> >  
> > -use super::Device;
> > +use super::{
> > +    ConfigSpaceSize,
> > +    Device, //
> > +};
> >  use crate::{
> >      bindings,
> >      device,
> >      devres::Devres,
> >      io::{
> > +        define_read,
> > +        define_write,
> > +        Io,
> > +        IoInfallible,
> >          Mmio,
> >          MmioRaw, //
> >      },
> > @@ -16,6 +23,58 @@
> >  };
> >  use core::ops::Deref;
> >  
> > +/// The PCI configuration space of a device.
> > +///
> > +/// Provides typed read and write accessors for configuration
> > registers +/// using the standard `pci_read_config_*` and
> > `pci_write_config_*` helpers. +///
> > +/// The generic const parameter `SIZE` can be used to indicate the
> > +/// maximum size of the configuration space (e.g. 256 bytes for
> > legacy, +/// 4096 bytes for extended config space).
> > +pub struct ConfigSpace<'a, const SIZE: usize = {
> > ConfigSpaceSize::Extended as usize }> {
> > +    pub(crate) pdev: &'a Device<device::Bound>,
> > +}
> > +
> > +macro_rules! call_config_read {
> > +    (infallible, $c_fn:ident, $self:ident, $ty:ty, $addr:expr) =>
> > {{
> > +        let mut val: $ty = 0;
> > +        let _ret = unsafe { bindings::$c_fn($self.pdev.as_raw(),
> > $addr as i32, &mut val) };
> > +        val
> > +    }};
> > +}
> > +
> > +macro_rules! call_config_write {
> > +    (infallible, $c_fn:ident, $self:ident, $ty:ty, $addr:expr,
> > $value:expr) => {
> > +        let _ret = unsafe { bindings::$c_fn($self.pdev.as_raw(),
> > $addr as i32, $value) };
> 
> unsafe block needs safety comments, also I understand 'as' to convert

snip

> is generally forbidden without a CAST: comment or using ::from() for
> conversion because it can by a lossy conversion.
> 

Let me take a look, basically this was similar with the define_{read,
mmio} macros, which has originally been from the mainline. Might have to
fix that part as well.

> Also we should have a comment on why its safe for _ret to be ignored.
> Basically what guarantees that the call is really infallible?
> Anything we can do to ensure errors are not silently ignored? Let me
> know if I missed something.
> 

This was discussed with Danilo on Zulip. The driver will observe a
!0 value on read when an error occurs in the infallible accessors. For
writes, I think the driver should read the value back. (similar with
MMIO cases)

Besides those, I think the driver needs to use fallible ones if it
really cares about the return.

Z.

> [..]
> 
> > +
> > +    /// Return an initialized config space object.
> > +    pub fn config_space_exteneded<'a>(
> 
> typo in func name.
> 
> thanks,
> 
>  - Joel
> 
> > +        &'a self,
> > +    ) -> Result<ConfigSpace<'a, {
> > ConfigSpaceSize::Extended.as_raw() }>> {
> > +        Ok(ConfigSpace { pdev: self })
> > +    }
> >  }
> > -- 
> > 2.51.0
> > 


  reply	other threads:[~2025-11-17 20:28 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-10 20:41 [PATCH v6 RESEND 0/7] rust: pci: add config space read/write support Zhi Wang
2025-11-10 20:41 ` [PATCH v6 RESEND 1/7] samples: rust: rust_driver_pci: use "kernel vertical" style for imports Zhi Wang
2025-11-10 20:41 ` [PATCH v6 RESEND 2/7] rust: devres: " Zhi Wang
2025-11-10 20:41 ` [PATCH v6 RESEND 3/7] rust: io: " Zhi Wang
2025-11-10 20:41 ` [PATCH v6 RESEND 4/7] rust: io: factor common I/O helpers into Io trait Zhi Wang
2025-11-13  7:36   ` Alexandre Courbot
2025-11-14 12:58   ` Alice Ryhl
2025-11-14 17:27     ` Zhi Wang
2025-11-14 18:53       ` Tamir Duberstein
2025-11-17 17:14         ` Zhi Wang
2025-11-14 20:31       ` Danilo Krummrich
2025-11-17 22:44     ` John Hubbard
2025-11-18 21:18       ` Danilo Krummrich
2025-11-18 23:43         ` John Hubbard
2025-11-10 20:41 ` [PATCH v6 RESEND 5/7] rust: io: factor out MMIO read/write macros Zhi Wang
2025-11-13  7:36   ` Alexandre Courbot
2025-11-14 16:06     ` Zhi Wang
2025-11-10 20:41 ` [PATCH v6 RESEND 6/7] rust: pci: add config space read/write support Zhi Wang
2025-11-13  7:56   ` Alexandre Courbot
2025-11-14 16:59     ` Zhi Wang
2025-11-14  0:20   ` Joel Fernandes
2025-11-17 20:28     ` Zhi Wang [this message]
2025-11-17 22:07     ` Danilo Krummrich
2025-11-10 20:41 ` [PATCH v6 RESNED 7/7] sample: rust: pci: add tests for config space routines Zhi Wang
2025-11-11  0:01 ` [PATCH v6 RESEND 0/7] rust: pci: add config space read/write support Joel Fernandes
2025-11-11  8:43   ` Zhi Wang

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