From: Bjorn Helgaas <helgaas@kernel.org>
To: Niklas Cassel <cassel@kernel.org>
Cc: "Shawn Lin" <shawn.lin@rock-chips.com>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Kever Yang" <kever.yang@rock-chips.com>,
"Simon Xue" <xxm@rock-chips.com>,
"Damien Le Moal" <dlemoal@kernel.org>,
"Dragan Simic" <dsimic@manjaro.org>,
"FUKAUMI Naoki" <naoki@radxa.com>,
"Diederik de Haas" <diederik@cknow-tech.com>,
"Richard Zhu" <hongxing.zhu@nxp.com>,
"Frank Li" <Frank.li@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"Conor Dooley" <conor@kernel.org>,
"Krzysztof Kozlowski" <krzk@kernel.org>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Hans Zhang" <hans.zhang@cixtech.com>,
linux-tegra@vger.kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, kernel@pengutronix.de,
"Bjorn Helgaas" <bhelgaas@google.com>
Subject: Re: [PATCH 2/4] PCI: tegra194: Remove unnecessary L1SS disable code
Date: Tue, 18 Nov 2025 14:31:21 -0600 [thread overview]
Message-ID: <20251118203121.GA2590423@bhelgaas> (raw)
In-Reply-To: <aRzRsFKkVouJDRRs@ryzen>
On Tue, Nov 18, 2025 at 09:06:08PM +0100, Niklas Cassel wrote:
> On Tue, Nov 18, 2025 at 12:59:17PM -0600, Bjorn Helgaas wrote:
> > On Wed, Nov 12, 2025 at 09:29:20AM +0100, Niklas Cassel wrote:
> > > On Tue, Nov 11, 2025 at 04:16:09PM -0600, Bjorn Helgaas wrote:
> > > > From: Bjorn Helgaas <bhelgaas@google.com>
> > > >
> > > > The DWC core clears the L1 Substates Supported bits unless the driver sets
> > > > the "dw_pcie.l1ss_support" flag.
> > > >
> > > > The tegra194 init_host_aspm() sets "dw_pcie.l1ss_support" if the platform
> > > > has the "supports-clkreq" DT property. If "supports-clkreq" is absent,
> > > > "dw_pcie.l1ss_support" is not set, and the DWC core will clear the L1
> > > > Substates Supported bits.
> > > >
> > > > The tegra194 code to clear the L1 Substates Supported bits is unnecessary,
> > > > so remove it.
> > > >
> > > > Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
> > > > ---
> > >
> > > Since init_host_aspm() is now the only place using struct tegra_pcie_dw
> > > struct member cfg_link_cap_l1sub, I think that you can remove this struct
> > > member, and instead make this a local variable in init_host_aspm().
> >
> > It looks like tegra_pcie_ep_irq_thread() also uses it, although I'm
> > dubious about that.
> >
> > It's odd that software would be responsible for sending LTR messages,
> > but I guess this only happens for tegra194_pcie_dw_ep_of_data, and
> > apparently it's fixed (".has_ltr_req_fix" for tegra234.
> >
> > And odd that we would read the capability register on every interrupt
> > even though this driver is the only thing that can change it, so we
> > should be able to cache the value in init_host_aspm().
>
> Yes, sorry, my thinking was that this code in tegra_pcie_ep_irq_thread():
>
> /* If EP doesn't advertise L1SS, just return */
> val = dw_pcie_readl_dbi(pci, pcie->cfg_link_cap_l1sub);
> if (!(val & (PCI_L1SS_CAP_ASPM_L1_1 | PCI_L1SS_CAP_ASPM_L1_2)))
> return IRQ_HANDLED;
>
>
> after your patch can be replaced with:
>
> /* If EP doesn't advertise L1SS, just return */
> if (!pci->l1ss_support)
> return IRQ_HANDLED;
>
>
> Since we already know that if !pci->l1ss_support,
> these bits will be cleared by DWC common code.
>
>
> So, after that, we could replace the struct tegra_pcie_dw
> struct member cfg_link_cap_l1sub with a local variable in
> init_host_aspm().
Oh, of course, thanks!
next prev parent reply other threads:[~2025-11-18 20:31 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-11 22:16 [PATCH 0/4] PCI: dwc: Advertise L1 PM Substates only if driver requests it Bjorn Helgaas
2025-11-11 22:16 ` [PATCH 1/4] " Bjorn Helgaas
2025-11-11 22:48 ` Frank Li
2025-11-11 23:07 ` Bjorn Helgaas
2025-11-12 1:03 ` Shawn Lin
2025-11-18 19:48 ` Bjorn Helgaas
2025-11-12 8:22 ` Niklas Cassel
2025-11-12 17:51 ` Manivannan Sadhasivam
2025-11-18 20:22 ` Bjorn Helgaas
2025-11-18 20:36 ` Bjorn Helgaas
2025-11-18 20:45 ` Niklas Cassel
2025-11-11 22:16 ` [PATCH 2/4] PCI: tegra194: Remove unnecessary L1SS disable code Bjorn Helgaas
2025-11-12 8:29 ` Niklas Cassel
2025-11-18 18:59 ` Bjorn Helgaas
2025-11-18 20:06 ` Niklas Cassel
2025-11-18 20:31 ` Bjorn Helgaas [this message]
2025-11-11 22:16 ` [PATCH 3/4] PCI: dw-rockchip: Configure L1sub support Bjorn Helgaas
2025-11-12 2:49 ` Hans Zhang
2025-11-12 8:30 ` Diederik de Haas
2025-11-12 8:36 ` Niklas Cassel
2025-11-11 22:16 ` [PATCH 4/4] arm64: dts: rockchip: Add PCIe clkreq stuff for RK3588 EVB1 Bjorn Helgaas
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