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Thu, 04 Dec 2025 10:30:57 -0800 (PST) From: Matthew W Carlis To: macro@orcam.me.uk Cc: ahuang12@lenovo.com, alok.a.tiwari@oracle.com, ashishk@purestorage.com, bamstadt@purestorage.com, bhelgaas@google.com, guojinhui.liam@bytedance.com, ilpo.jarvinen@linux.intel.com, jiwei.sun.bj@qq.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, lukas@wunner.de, mattc@purestorage.com, msaggi@purestorage.com, sconnor@purestorage.com, sunjw10@lenovo.com Subject: Re: [PATCH] PCI: Always lift 2.5GT/s restriction in PCIe failed link retraining Date: Thu, 4 Dec 2025 11:30:36 -0700 Message-ID: <20251204183036.39649-1-mattc@purestorage.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit I'm sorry my last response kind of messed up the threading in this chain... I don't understand why we still think its a good idea to have this action in the kernel for any device type since it seems to only help Maciej W. Rozycki's specific situation which is very likely to be the only one of its kind. In addition the Delock adapter isn't what I would consider a particularly "solid" device. For what its worth I have a particular Gen5 device in my lab here that gets stuck in an infinite link up-down loop when you force the speed to Gen2 when also combined with a specific downstream port... I'm sure there is another device somewhere else in the world that has the same issue when you force it to Gen1. The kernel should assume a PCIe link will automatically train to the best speed that the devices can achieve & if the link fails to train then it should be up to the user space to decide what to do with it in my opinion.