From: Zhi Wang <zhiw@nvidia.com>
To: <rust-for-linux@vger.kernel.org>, <linux-pci@vger.kernel.org>,
<nouveau@lists.freedesktop.org>, <linux-kernel@vger.kernel.org>
Cc: <airlied@gmail.com>, <dakr@kernel.org>, <aliceryhl@google.com>,
<bhelgaas@google.com>, <kwilczynski@kernel.org>,
<ojeda@kernel.org>, <alex.gaynor@gmail.com>,
<boqun.feng@gmail.com>, <gary@garyguo.net>,
<bjorn3_gh@protonmail.com>, <lossin@kernel.org>,
<a.hindborg@kernel.org>, <tmgross@umich.edu>,
<markus.probst@posteo.de>, <helgaas@kernel.org>,
<cjia@nvidia.com>, <alex@shazbot.org>, <smitra@nvidia.com>,
<ankita@nvidia.com>, <aniketa@nvidia.com>, <kwankhede@nvidia.com>,
<targupta@nvidia.com>, <acourbot@nvidia.com>,
<joelagnelf@nvidia.com>, <jhubbard@nvidia.com>,
<zhiwang@kernel.org>, Zhi Wang <zhiw@nvidia.com>
Subject: [RFC 5/7] gpu: nova-core: set RMSetSriovMode when NVIDIA vGPU is enabled
Date: Sat, 6 Dec 2025 12:42:06 +0000 [thread overview]
Message-ID: <20251206124208.305963-6-zhiw@nvidia.com> (raw)
In-Reply-To: <20251206124208.305963-1-zhiw@nvidia.com>
The registry object "RMSetSriovMode" is required to be set when vGPU is
enabled.
Set "RMSetSriovMode" to 1 when nova-core is loading the GSP firmware and
initialize the GSP registry objects, if vGPU is enabled.
Signed-off-by: Zhi Wang <zhiw@nvidia.com>
---
drivers/gpu/nova-core/gsp/boot.rs | 3 ++-
drivers/gpu/nova-core/gsp/commands.rs | 23 +++++++++++++++--------
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/boot.rs
index 5016c630cec3..847ce550eccf 100644
--- a/drivers/gpu/nova-core/gsp/boot.rs
+++ b/drivers/gpu/nova-core/gsp/boot.rs
@@ -168,7 +168,8 @@ pub(crate) fn boot(
self.cmdq
.send_command(bar, commands::SetSystemInfo::new(pdev, vf_info))?;
- self.cmdq.send_command(bar, commands::SetRegistry::new())?;
+ self.cmdq
+ .send_command(bar, commands::SetRegistry::new(vgpu_support))?;
gsp_falcon.reset(bar)?;
let libos_handle = self.libos.dma_handle();
diff --git a/drivers/gpu/nova-core/gsp/commands.rs b/drivers/gpu/nova-core/gsp/commands.rs
index 1d519c4ed232..00ba48a25444 100644
--- a/drivers/gpu/nova-core/gsp/commands.rs
+++ b/drivers/gpu/nova-core/gsp/commands.rs
@@ -64,16 +64,18 @@ struct RegistryEntry {
/// The `SetRegistry` command.
pub(crate) struct SetRegistry {
- entries: [RegistryEntry; Self::NUM_ENTRIES],
+ entries: [RegistryEntry; Self::MAX_NUM_ENTRIES],
+ num_entries: usize,
}
impl SetRegistry {
// For now we hard-code the registry entries. Future work will allow others to
// be added as module parameters.
- const NUM_ENTRIES: usize = 3;
+ const MAX_NUM_ENTRIES: usize = 4;
/// Creates a new `SetRegistry` command, using a set of hardcoded entries.
- pub(crate) fn new() -> Self {
+ pub(crate) fn new(vgpu_support: bool) -> Self {
+ let num_entries = if vgpu_support { 4 } else { 3 };
Self {
entries: [
// RMSecBusResetEnable - enables PCI secondary bus reset
@@ -93,7 +95,12 @@ pub(crate) fn new() -> Self {
key: "RMDevidCheckIgnore",
value: 1,
},
+ RegistryEntry {
+ key: "RMSetSriovMode",
+ value: 1,
+ },
],
+ num_entries,
}
}
}
@@ -104,15 +111,15 @@ impl CommandToGsp for SetRegistry {
type InitError = Infallible;
fn init(&self) -> impl Init<Self::Command, Self::InitError> {
- PackedRegistryTable::init(Self::NUM_ENTRIES as u32, self.variable_payload_len() as u32)
+ PackedRegistryTable::init(self.num_entries as u32, self.variable_payload_len() as u32)
}
fn variable_payload_len(&self) -> usize {
let mut key_size = 0;
- for i in 0..Self::NUM_ENTRIES {
+ for i in 0..self.num_entries {
key_size += self.entries[i].key.len() + 1; // +1 for NULL terminator
}
- Self::NUM_ENTRIES * size_of::<PackedRegistryEntry>() + key_size
+ self.num_entries * size_of::<PackedRegistryEntry>() + key_size
}
fn init_variable_payload(
@@ -120,12 +127,12 @@ fn init_variable_payload(
dst: &mut SBufferIter<core::array::IntoIter<&mut [u8], 2>>,
) -> Result {
let string_data_start_offset =
- size_of::<PackedRegistryTable>() + Self::NUM_ENTRIES * size_of::<PackedRegistryEntry>();
+ size_of::<PackedRegistryTable>() + self.num_entries * size_of::<PackedRegistryEntry>();
// Array for string data.
let mut string_data = KVec::new();
- for entry in self.entries.iter().take(Self::NUM_ENTRIES) {
+ for entry in self.entries.iter().take(self.num_entries) {
dst.write_all(
PackedRegistryEntry::new(
(string_data_start_offset + string_data.len()) as u32,
--
2.51.0
next prev parent reply other threads:[~2025-12-06 12:42 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-06 12:42 [RFC 0/7] gpu: nova-core: Enable booting GSP with vGPU enabled Zhi Wang
2025-12-06 12:42 ` [RFC 1/7] rust: pci: expose sriov_get_totalvfs() helper Zhi Wang
2025-12-07 7:12 ` Dirk Behme
2025-12-09 1:09 ` Miguel Ojeda
2025-12-09 14:22 ` Zhi Wang
2025-12-09 3:42 ` Alexandre Courbot
2025-12-10 11:31 ` Alexandre Courbot
2025-12-06 12:42 ` [RFC 2/7] [!UPSTREAM] rust: pci: support configuration space access Zhi Wang
2025-12-10 22:51 ` Ewan CHORYNSKI
2025-12-06 12:42 ` [RFC 3/7] gpu: nova-core: introduce vgpu_support module param Zhi Wang
2025-12-06 12:42 ` [RFC 4/7] gpu: nova-core: populate GSP_VF_INFO when vGPU is enabled Zhi Wang
2025-12-07 2:32 ` Joel Fernandes
2025-12-09 13:41 ` Zhi Wang
2025-12-11 8:36 ` Joel Fernandes
2025-12-12 0:16 ` John Hubbard
2025-12-12 0:29 ` Joel Fernandes
2025-12-10 14:27 ` Alexandre Courbot
2025-12-06 12:42 ` Zhi Wang [this message]
2025-12-07 15:55 ` [RFC 5/7] gpu: nova-core: set RMSetSriovMode when NVIDIA " Timur Tabi
2025-12-07 16:57 ` Joel Fernandes
2025-12-09 14:28 ` Zhi Wang
2025-12-15 4:28 ` Alexandre Courbot
2025-12-06 12:42 ` [RFC 6/7] gpu: nova-core: reserve a larger GSP WPR2 heap when " Zhi Wang
2025-12-15 4:35 ` Alexandre Courbot
2025-12-06 12:42 ` [RFC 7/7] gpu: nova-core: load the scrubber ucode when vGPU support " Zhi Wang
2025-12-07 2:26 ` Joel Fernandes
2025-12-09 14:05 ` Zhi Wang
2025-12-11 1:24 ` Joel Fernandes
2025-12-07 6:42 ` Dirk Behme
2025-12-15 4:45 ` Alexandre Courbot
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20251206124208.305963-6-zhiw@nvidia.com \
--to=zhiw@nvidia.com \
--cc=a.hindborg@kernel.org \
--cc=acourbot@nvidia.com \
--cc=airlied@gmail.com \
--cc=alex.gaynor@gmail.com \
--cc=alex@shazbot.org \
--cc=aliceryhl@google.com \
--cc=aniketa@nvidia.com \
--cc=ankita@nvidia.com \
--cc=bhelgaas@google.com \
--cc=bjorn3_gh@protonmail.com \
--cc=boqun.feng@gmail.com \
--cc=cjia@nvidia.com \
--cc=dakr@kernel.org \
--cc=gary@garyguo.net \
--cc=helgaas@kernel.org \
--cc=jhubbard@nvidia.com \
--cc=joelagnelf@nvidia.com \
--cc=kwankhede@nvidia.com \
--cc=kwilczynski@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lossin@kernel.org \
--cc=markus.probst@posteo.de \
--cc=nouveau@lists.freedesktop.org \
--cc=ojeda@kernel.org \
--cc=rust-for-linux@vger.kernel.org \
--cc=smitra@nvidia.com \
--cc=targupta@nvidia.com \
--cc=tmgross@umich.edu \
--cc=zhiwang@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox