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From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Dominik Brodowski <linux@dominikbrodowski.net>,
	linux-kernel@vger.kernel.org
Cc: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>,
	"Malte Schröder" <malte+lkml@tnxip.de>,
	stable@vger.kernel.org
Subject: [PATCH 02/23] PCI: Rewrite bridge window head alignment function
Date: Fri, 19 Dec 2025 19:40:15 +0200	[thread overview]
Message-ID: <20251219174036.16738-3-ilpo.jarvinen@linux.intel.com> (raw)
In-Reply-To: <20251219174036.16738-1-ilpo.jarvinen@linux.intel.com>

The calculation of bridge window head alignment is done by
calculate_mem_align() [*]. With the default bridge window alignment, it
is used for both head and tail alignment.

The selected head alignment does not always result in tight-fitting
resources (gap at d4f00000-d4ffffff):

    d4800000-dbffffff : PCI Bus 0000:06
      d4800000-d48fffff : PCI Bus 0000:07
        d4800000-d4803fff : 0000:07:00.0
          d4800000-d4803fff : nvme
      d4900000-d49fffff : PCI Bus 0000:0a
        d4900000-d490ffff : 0000:0a:00.0
          d4900000-d490ffff : r8169
        d4910000-d4913fff : 0000:0a:00.0
      d4a00000-d4cfffff : PCI Bus 0000:0b
        d4a00000-d4bfffff : 0000:0b:00.0
          d4a00000-d4bfffff : 0000:0b:00.0
        d4c00000-d4c07fff : 0000:0b:00.0
      d4d00000-d4dfffff : PCI Bus 0000:15
        d4d00000-d4d07fff : 0000:15:00.0
          d4d00000-d4d07fff : xhci-hcd
      d4e00000-d4efffff : PCI Bus 0000:16
        d4e00000-d4e7ffff : 0000:16:00.0
        d4e80000-d4e803ff : 0000:16:00.0
          d4e80000-d4e803ff : ahci
      d5000000-dbffffff : PCI Bus 0000:0c

This has not been caused problems (for years) with the default bridge
window tail alignment that grossly over-estimates the required tail
alignment leaving more tail room than necessary. With the introduction
of relaxed tail alignment that leaves no extra tail room whatsoever,
any gaps will immediately turn into assignment failures.

Introduce head alignment calculation that ensures no gaps are left and
apply the new approach when using relaxed alignment. We may want to
consider using it for the normal alignment eventually, but as the first
step, solve only the problem with the relaxed tail alignment.

([*] I don't understand the algorithm in calculate_mem_align().)

Fixes: 5d0a8965aea9 ("[PATCH] 2.5.14: New PCI allocation code (alpha, arm, parisc) [2/2]")
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220775
Reported-by: Malte Schröder <malte+lkml@tnxip.de>
Tested-by: Malte Schröder <malte+lkml@tnxip.de>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Cc: stable@vger.kernel.org
---

Little annoyingly, there's difference in what aligns array contains
between the legacy alignment approach (which I dare not to touch as I
really don't understand what the algorithm tries to do) and this new
head aligment algorithm, both consuming stack space. After making the
new approach the only available approach in the follow-up patch, only
one array remains (however, that follow-up change is also somewhat
riskier when it comes to regressions).

That being said, the new head alignment could work with the same aligns
array as the legacy approach, it just won't necessarily produce an
optimal (the smallest possible) head alignment when if (r_size <=
align) condition is used. Just let me know if that approach is
preferred (to save some stack space).
---
 drivers/pci/setup-bus.c | 53 ++++++++++++++++++++++++++++++++++-------
 1 file changed, 44 insertions(+), 9 deletions(-)

diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 4b918ff4d2d8..80e5a8fc62e7 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -1228,6 +1228,45 @@ static inline resource_size_t calculate_mem_align(resource_size_t *aligns,
 	return min_align;
 }
 
+/*
+ * Calculate bridge window head alignment that leaves no gaps in between
+ * resources.
+ */
+static resource_size_t calculate_head_align(resource_size_t *aligns,
+					    int max_order)
+{
+	resource_size_t head_align = 1;
+	resource_size_t remainder = 0;
+	int order;
+
+	/* Take the largest alignment as the starting point. */
+	head_align <<= max_order + __ffs(SZ_1M);
+
+	for (order = max_order - 1; order >= 0; order--) {
+		resource_size_t align1 = 1;
+
+		align1 <<= order + __ffs(SZ_1M);
+
+		/*
+		 * Account smaller resources with alignment < max_order that
+		 * could be used to fill head room if alignment less than
+		 * max_order is used.
+		 */
+		remainder += aligns[order];
+
+		/*
+		 * Test if head fill is enough to satisfy the alignment of
+		 * the larger resources after reducing the alignment.
+		 */
+		while ((head_align > align1) && (remainder >= head_align / 2)) {
+			head_align /= 2;
+			remainder -= head_align;
+		}
+	}
+
+	return head_align;
+}
+
 /**
  * pbus_upstream_space_available - Check no upstream resource limits allocation
  * @bus:	The bus
@@ -1315,13 +1354,13 @@ static void pbus_size_mem(struct pci_bus *bus, unsigned long type,
 {
 	struct pci_dev *dev;
 	resource_size_t min_align, win_align, align, size, size0, size1 = 0;
-	resource_size_t aligns[28]; /* Alignments from 1MB to 128TB */
+	resource_size_t aligns[28] = {}; /* Alignments from 1MB to 128TB */
+	resource_size_t aligns2[28] = {};/* Alignments from 1MB to 128TB */
 	int order, max_order;
 	struct resource *b_res = pbus_select_window_for_type(bus, type);
 	resource_size_t children_add_size = 0;
 	resource_size_t children_add_align = 0;
 	resource_size_t add_align = 0;
-	resource_size_t relaxed_align;
 	resource_size_t old_size;
 
 	if (!b_res)
@@ -1331,7 +1370,6 @@ static void pbus_size_mem(struct pci_bus *bus, unsigned long type,
 	if (b_res->parent)
 		return;
 
-	memset(aligns, 0, sizeof(aligns));
 	max_order = 0;
 	size = 0;
 
@@ -1382,6 +1420,7 @@ static void pbus_size_mem(struct pci_bus *bus, unsigned long type,
 			 */
 			if (r_size <= align)
 				aligns[order] += align;
+			aligns2[order] += align;
 			if (order > max_order)
 				max_order = order;
 
@@ -1406,9 +1445,7 @@ static void pbus_size_mem(struct pci_bus *bus, unsigned long type,
 
 	if (bus->self && size0 &&
 	    !pbus_upstream_space_available(bus, b_res, size0, min_align)) {
-		relaxed_align = 1ULL << (max_order + __ffs(SZ_1M));
-		relaxed_align = max(relaxed_align, win_align);
-		min_align = min(min_align, relaxed_align);
+		min_align = calculate_head_align(aligns2, max_order);
 		size0 = calculate_memsize(size, min_size, 0, 0, old_size, win_align);
 		resource_set_range(b_res, min_align, size0);
 		pci_info(bus->self, "bridge window %pR to %pR requires relaxed alignment rules\n",
@@ -1422,9 +1459,7 @@ static void pbus_size_mem(struct pci_bus *bus, unsigned long type,
 
 		if (bus->self && size1 &&
 		    !pbus_upstream_space_available(bus, b_res, size1, add_align)) {
-			relaxed_align = 1ULL << (max_order + __ffs(SZ_1M));
-			relaxed_align = max(relaxed_align, win_align);
-			min_align = min(min_align, relaxed_align);
+			min_align = calculate_head_align(aligns2, max_order);
 			size1 = calculate_memsize(size, min_size, add_size, children_add_size,
 						  old_size, win_align);
 			pci_info(bus->self,
-- 
2.39.5


  parent reply	other threads:[~2025-12-19 17:41 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-19 17:40 [PATCH 00/23] PCI: Resource code fixes (supercedes earlier series) & cleanups Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 01/23] PCI: Fix bridge window alignment with optional resources Ilpo Järvinen
2025-12-19 17:40 ` Ilpo Järvinen [this message]
2026-01-26 22:17   ` [PATCH 02/23] PCI: Rewrite bridge window head alignment function Bjorn Helgaas
2026-01-27 11:22     ` Ilpo Järvinen
2026-01-27 22:39       ` Bjorn Helgaas
2025-12-19 17:40 ` [PATCH 03/23] PCI: Stop over-estimating bridge window size Ilpo Järvinen
2026-03-05 15:13   ` Guenter Roeck
2026-03-05 16:28     ` Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 04/23] resource: Increase MAX_IORES_LEVEL to 8 Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 05/23] PCI: Remove old_size limit from bridge window sizing Ilpo Järvinen
2026-01-26 17:16   ` Bjorn Helgaas
2026-01-26 20:09     ` Bjorn Helgaas
2026-01-27 11:39       ` Ilpo Järvinen
2026-01-27 22:42         ` Bjorn Helgaas
2026-01-27 10:16     ` Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 06/23] PCI: Push realloc check into pbus_size_mem() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 07/23] PCI: Pass bridge window resource to pbus_size_mem() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 08/23] PCI: Use res_to_dev_res() in reassign_resources_sorted() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 09/23] PCI: Fetch dev_res to local var in __assign_resources_sorted() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 10/23] PCI: Add pci_resource_is_bridge_win() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 11/23] PCI: Log reset and restore of resources Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 12/23] PCI: Check invalid align earlier in pbus_size_mem() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 13/23] PCI: Add pbus_mem_size_optional() to handle optional sizes Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 14/23] resource: Mark res given to resource_assigned() as const Ilpo Järvinen
2025-12-19 17:47   ` Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 15/23] PCI: Use resource_assigned() in setup-bus.c algorithm Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 16/23] PCI: Properly prefix struct pci_dev_resource handling functions Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 17/23] PCI: Separate cardbus setup & build it only with CONFIG_CARDBUS Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 18/23] PCI: Handle CardBus specific params in setup-cardbus.c Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 19/23] PCI: Use scnprintf() instead of sprintf() Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 20/23] PCI: Add Bus Number + Secondary Latency Timer as dword fields Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 21/23] PCI: Convert to use Bus Number field defines Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 22/23] PCI: Add pbus_validate_busn() for Bus Number validation Ilpo Järvinen
2025-12-19 17:40 ` [PATCH 23/23] PCI: Move scanbus bridge scanning to setup-cardbus.c Ilpo Järvinen
2026-01-26 17:39 ` [PATCH 00/23] PCI: Resource code fixes (supercedes earlier series) & cleanups Bjorn Helgaas

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