From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2644E327798; Mon, 22 Dec 2025 06:42:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766385759; cv=none; b=ITuldA0X1ZZc5IJUsOLF3D59/xNGujzSw2/lwZ5bEyoERIGXv2ydZB9rDDqYxnK7kkkaP2sxjhpXedS/DGE8ktbx3zxmy4PVi1dzKmnCJDByb+kk4J3KDGXGjMV+rw5pwihCNW+AHvcEnZ/5ewKDUlFaKC/CmI/p7po5wZj8f/Q= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1766385759; c=relaxed/simple; bh=rbaPtQrf0HSBpdGZJEVTDeK21cwJjv8CK+FQJrVL9Tg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nsO4lMr6L/DJGjDVg9r2th+jB45bLJ9Q+ZLEWXdIaa/aDPK+NZnzauv0seuMxdPjRhLWi8zVevzXrkjs0L/PrYEdB2/YQ5Cl68Y1VsXO7Wf2z3o6HLbwHrW7xip2qM7v1SoDL1djK0nudBEBDlfEuWib6l88wjZRO+75jaaWsog= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ibPQ3Jtc; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ibPQ3Jtc" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6044FC4CEF1; Mon, 22 Dec 2025 06:42:36 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1766385759; bh=rbaPtQrf0HSBpdGZJEVTDeK21cwJjv8CK+FQJrVL9Tg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ibPQ3JtcibNcRbehlAujPJj3hXTzW3YTCMzYgcuXXP/hfDM3VsDS4BDaWBKNTifCM Rlo1A2mBFNivnueFbCiW7bgBsqIsW/tO88vc3Z95AM1FpFEkgqY5aK3kpg8wG2/Jq0 h9S6Ds4EVHLwzLoW6EAtDWsLpDVq+SWKwVt+twKWQR5sx6Y2ZGBM9qw3/tfaj9IdNG o15P1k9QtS/hbbzlyTCXrnA9F2Z/BlsqIW2HhejvG29+VlYgmLciSHFjaCzEaSenqv 64CDFjUjaYP1YvTCvJaBzJFmEwPT8HZElft6vK7hJV/OZeK0oSKqfOVEiIsDePclYA rprAS/esiwfMg== From: Niklas Cassel To: Manivannan Sadhasivam , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas Cc: Shawn Lin , FUKAUMI Naoki , Krishna chaitanya chundru , Damien Le Moal , Niklas Cassel , stable@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v2 4/6] Revert "PCI: qcom: Enable MSI interrupts together with Link up if 'Global IRQ' is supported" Date: Mon, 22 Dec 2025 07:42:11 +0100 Message-ID: <20251222064207.3246632-12-cassel@kernel.org> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251222064207.3246632-8-cassel@kernel.org> References: <20251222064207.3246632-8-cassel@kernel.org> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3975; i=cassel@kernel.org; h=from:subject; bh=rbaPtQrf0HSBpdGZJEVTDeK21cwJjv8CK+FQJrVL9Tg=; b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGDI9XrgbJcX4TTPTZn1xXcaDV/z1pyf58joW7DI8Bi29T ZFZMSodpSwMYlwMsmKKLL4/XPYXd7tPOa54xwZmDisTyBAGLk4BmIiUOSPD6uwErZ0pfDcUFm78 O12q+7Ljl58eJmrtx8Ka3/SxWvcHMTIsS3jFFGltdMjW/Y3CTbfVzOs9rf1OL5PkaZr86+WK23O ZAA== X-Developer-Key: i=cassel@kernel.org; a=openpgp; fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA Content-Transfer-Encoding: 8bit This reverts commit ba4a2e2317b9faeca9193ed6d3193ddc3cf2aba3. While this fake hotplugging was a nice idea, it has shown that this feature does not handle PCIe switches correctly: pci_bus 0004:43: busn_res: can not insert [bus 43-41] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci_bus 0004:43: busn_res: [bus 43-41] end is updated to 43 pci_bus 0004:43: busn_res: can not insert [bus 43] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci 0004:42:00.0: devices behind bridge are unusable because [bus 43] cannot be assigned for them pci_bus 0004:44: busn_res: can not insert [bus 44-41] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci_bus 0004:44: busn_res: [bus 44-41] end is updated to 44 pci_bus 0004:44: busn_res: can not insert [bus 44] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci 0004:42:02.0: devices behind bridge are unusable because [bus 44] cannot be assigned for them pci_bus 0004:45: busn_res: can not insert [bus 45-41] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci_bus 0004:45: busn_res: [bus 45-41] end is updated to 45 pci_bus 0004:45: busn_res: can not insert [bus 45] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci 0004:42:06.0: devices behind bridge are unusable because [bus 45] cannot be assigned for them pci_bus 0004:46: busn_res: can not insert [bus 46-41] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci_bus 0004:46: busn_res: [bus 46-41] end is updated to 46 pci_bus 0004:46: busn_res: can not insert [bus 46] under [bus 42-41] (conflicts with (null) [bus 42-41]) pci 0004:42:0e.0: devices behind bridge are unusable because [bus 46] cannot be assigned for them pci_bus 0004:42: busn_res: [bus 42-41] end is updated to 46 pci_bus 0004:42: busn_res: can not insert [bus 42-46] under [bus 41] (conflicts with (null) [bus 41]) pci 0004:41:00.0: devices behind bridge are unusable because [bus 42-46] cannot be assigned for them pcieport 0004:40:00.0: bridge has subordinate 41 but max busn 46 During the initial scan, PCI core doesn't see the switch and since the Root Port is not hot plug capable, the secondary bus number gets assigned as the subordinate bus number. This means, the PCI core assumes that only one bus will appear behind the Root Port since the Root Port is not hot plug capable. This works perfectly fine for PCIe endpoints connected to the Root Port, since they don't extend the bus. However, if a PCIe switch is connected, then there is a problem when the downstream busses starts showing up and the PCI core doesn't extend the subordinate bus number after initial scan during boot. The long term plan is to migrate this driver to the pwrctrl framework, once it adds proper support for powering up and enumerating PCIe switches. Cc: stable@vger.kernel.org Suggested-by: Manivannan Sadhasivam Acked-by: Shawn Lin Tested-by: Shawn Lin Signed-off-by: Niklas Cassel --- drivers/pci/controller/dwc/pcie-qcom.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index e87ec6779d44..c5fcb87972e9 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -136,7 +136,6 @@ /* PARF_INT_ALL_{STATUS/CLEAR/MASK} register fields */ #define PARF_INT_ALL_LINK_UP BIT(13) -#define PARF_INT_MSI_DEV_0_7 GENMASK(30, 23) /* PARF_NO_SNOOP_OVERRIDE register fields */ #define WR_NO_SNOOP_OVERRIDE_EN BIT(1) @@ -1982,8 +1981,7 @@ static int qcom_pcie_probe(struct platform_device *pdev) goto err_host_deinit; } - writel_relaxed(PARF_INT_ALL_LINK_UP | PARF_INT_MSI_DEV_0_7, - pcie->parf + PARF_INT_ALL_MASK); + writel_relaxed(PARF_INT_ALL_LINK_UP, pcie->parf + PARF_INT_ALL_MASK); } qcom_pcie_icc_opp_update(pcie); -- 2.52.0