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From: Jonathan Cameron <jonathan.cameron@huawei.com>
To: Davidlohr Bueso <dave@stgolabs.net>
Cc: <smadhavan@nvidia.com>, <dave.jiang@intel.com>,
	<alison.schofield@intel.com>, <vishal.l.verma@intel.com>,
	<ira.weiny@intel.com>, <dan.j.williams@intel.com>,
	<bhelgaas@google.com>, <ming.li@zohomail.com>, <rrichter@amd.com>,
	<Smita.KoralahalliChannabasappa@amd.com>,
	<huaisheng.ye@intel.com>, <linux-cxl@vger.kernel.org>,
	<linux-pci@vger.kernel.org>, <vaslot@nvidia.com>,
	<vsethi@nvidia.com>, <sdonthineni@nvidia.com>,
	<vidyas@nvidia.com>, <mochs@nvidia.com>, <jsequeira@nvidia.com>
Subject: Re: [PATCH v4 07/10] cxl: add host cache flush and multi-function reset
Date: Thu, 22 Jan 2026 09:53:01 +0000	[thread overview]
Message-ID: <20260122095301.00001ebd@huawei.com> (raw)
In-Reply-To: <20260121202755.kwbpzjxuevnah6so@offworld>

On Wed, 21 Jan 2026 12:27:55 -0800
Davidlohr Bueso <dave@stgolabs.net> wrote:

> On Wed, 21 Jan 2026, Jonathan Cameron wrote:
> 
> >On Tue, 20 Jan 2026 22:26:07 +0000
> >smadhavan@nvidia.com wrote:
> >  
> >> From: Srirangan Madhavan <smadhavan@nvidia.com>
> >>
> >> Flush host CPU caches for mapped HDM ranges after teardown and prepare
> >> sibling Type 2 functions on multi-function devices. The host cache
> >> maintenance uses wbinvd_on_all_cpus() on x86 and VA-based PoC clean+  
> >
> >That's not sufficient in general on arm64.  It might flush far enough
> >or there might be buffers beyond the point of coherence that are not
> >flushed.  
> 
> ... and quite slow for large regions without firmware assistance
> (CLEAN_INV_MEMREGION from PSCI 1.3).

Just for completeness in case anyone takes this comment out of context.

CLEAN_INV_MEMREGION was dropped after that spec when beyond alpha. See F.b release.
https://developer.arm.com/documentation/den0022/fb/?lang=en
Talk to you to your favorite Arm architecture person for why
(I'll just say it was a good reason).

Also there is no guarantee that firmware interface does it any faster.
Implementation defined and all that.

No one jumped on my proposal to write an ACPI AML wrapper spec
so for now only option is to write a specific driver if you have
a hardware agent that offloads these operations (like the hisi_hha does).




> 
> >Until there are clarifications from Arm we need something like the
> >agents in drivers/cache to do equivalent of wbinvd_on_all_cpus()
> >(be it on a PA range to making a tiny bit less horrible)
> >
> >Or we need an opt in list for platforms where a flush to PoC is enough.
> >
> >Needs to some sort of arch_ call as well, not hidden in the cxl driver.  
> 
> Reset should just be using cpu_cache_invalidate_memregion().
> 
> ... now, in addition to DCD, we have two users that are beyond the
> "just once at boot time" use case.

or Back-Invalidate to do this from the device side. If anyone has built that yet...
Beware physical address based prefetchers though as there be monsters.

Jonathan

> 
> Thanks,
> Davidlohr
> 


  reply	other threads:[~2026-01-22  9:53 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-20 22:26 [PATCH v4 0/10] CXL Reset support for Type 2 devices smadhavan
2026-01-20 22:26 ` [PATCH v4 01/10] cxl: move DVSEC defines to cxl pci header smadhavan
2026-01-21 10:31   ` Jonathan Cameron
2026-01-20 22:26 ` [PATCH v4 02/10] PCI: switch CXL port DVSEC defines smadhavan
2026-01-21 10:34   ` Jonathan Cameron
2026-01-20 22:26 ` [PATCH v4 03/10] cxl: add type 2 helper and reset DVSEC bits smadhavan
2026-01-20 23:27   ` Dave Jiang
2026-01-21 10:45     ` Jonathan Cameron
2026-01-20 22:26 ` [PATCH v4 04/10] PCI: add CXL reset method smadhavan
2026-01-21  0:08   ` Dave Jiang
2026-01-21 10:57   ` Jonathan Cameron
2026-01-23 13:54   ` kernel test robot
2026-01-20 22:26 ` [PATCH v4 05/10] cxl: add reset prepare and region teardown smadhavan
2026-01-21 11:09   ` Jonathan Cameron
2026-01-21 21:25   ` Dave Jiang
2026-01-20 22:26 ` [PATCH v4 06/10] PCI: wire CXL reset prepare/cleanup smadhavan
2026-01-21 22:13   ` Dave Jiang
2026-01-22  2:17     ` Srirangan Madhavan
2026-01-22 15:11       ` Dave Jiang
2026-01-24  7:54   ` kernel test robot
2026-01-20 22:26 ` [PATCH v4 07/10] cxl: add host cache flush and multi-function reset smadhavan
2026-01-21 11:20   ` Jonathan Cameron
2026-01-21 20:27     ` Davidlohr Bueso
2026-01-22  9:53       ` Jonathan Cameron [this message]
2026-01-21 22:19     ` Vikram Sethi
2026-01-22  9:40       ` Souvik Chakravarty
     [not found]     ` <PH7PR12MB9175CDFC163843BB497073CEBD96A@PH7PR12MB9175.namprd12.prod.outlook.com>
2026-01-22 10:31       ` Jonathan Cameron
2026-01-22 19:24         ` Vikram Sethi
2026-01-23 13:13           ` Jonathan Cameron
2026-01-21 23:59   ` Dave Jiang
2026-01-20 22:26 ` [PATCH v4 08/10] cxl: add DVSEC config save/restore smadhavan
2026-01-21 11:31   ` Jonathan Cameron
2026-01-20 22:26 ` [PATCH v4 09/10] PCI: save/restore CXL config around reset smadhavan
2026-01-21 22:32   ` Dave Jiang
2026-01-22 10:01   ` Lukas Wunner
2026-01-22 10:47     ` Jonathan Cameron
2026-01-26 22:34       ` Alex Williamson
2026-03-12 18:24         ` Jonathan Cameron
2026-01-20 22:26 ` [PATCH v4 10/10] cxl: add HDM decoder and IDE save/restore smadhavan
2026-01-21 11:42   ` Jonathan Cameron
2026-01-22 15:09   ` Dave Jiang
2026-01-21  1:19 ` [PATCH v4 0/10] CXL Reset support for Type 2 devices Alison Schofield
2026-01-22  0:00 ` Bjorn Helgaas
2026-01-27 16:33 ` Alex Williamson
2026-01-27 17:02   ` dan.j.williams
2026-01-27 18:07     ` Vikram Sethi
2026-01-28  3:42       ` dan.j.williams
2026-01-28 12:36         ` Jonathan Cameron

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