Re: [PATCH] PCI/AER: Fix AER log missing in DPC case

[Jonathan Cameron <jonathan.cameron@huawei.com>]

On Tue, 27 Jan 2026 11:54:05 +0800
Sizhe Liu <liusizhe5@huawei.com> wrote:

> In the current DPC error reporting case, some AER log information
> is missing.

Wrap commit messages up to 75 chars, this is about 65.
Only do that for stuff where the formatting isn't fixed for other
reasons, such as the log below.

> 
> -- Error log abnormal (line breaks adjusted)
> [  976.604003] pcieport 0000:20:00.0: DPC: containment event, status:
> 0x1f11: unmasked uncorrectable error detected
> (------ AER error log supposed to be printed here, but missing ------)
> [  976.604030] nvme nvme0: frozen state error detected, reset controller
> [  977.812932] {4}[Hardware Error]: Hardware error from APEI
> Generic Hardware Error Source: 0
> 
This, but do remove timestamps as those don't matter to anyone.
Not wrapping helps if anyone is searching for this later.

Abnormal error log

  pcieport 0000:20:00.0: DPC: containment event, status: 0x1f11: unmasked uncorrectable error detected
(------ AER error log supposed to be printed here, but missing ------)
  nvme nvme0: frozen state error detected, reset controller
{4}[Hardware Error]: Hardware error from APEI Generic Hardware Error Source: 0


> Cause:
> In aer_print_error(), PCIe AER errors is reported, and is rate-limited
> by info->ratelimit_print[i]. There are two entry points for
> aer_print_error().
> 
> 1) Native AER
> aer_isr_one_error_type() -> aer_process_err_devices() ->
> aer_print_error()
> 2) DPC
> dpc_process_error() -> aer_print_error()
> 
> The value of info->ratelimit_print[i] is initialized correctly in
> the native AER case:

> aer_isr_one_error_type() -> find_source_device() ->
> find_device_iter() -> add_error_device()
> 
> In the DPC case, info->ratelimit_print[i] is not initialized and
> alloc by 0 , so in aer_print_error(), it will directly return at line
> if (!info->ratelimit_print[i])
> This will result in lossing the AER log messages in the DPC case.

losing

> 
> Solution:
> 1. Move the initialization of info->ratelimit_print[i] to
> aer_ratelimit_print_init().
> 2. Add aer_ratelimit_print_init() in dpc_process_error().
> 3. Replace the initialization by aer_ratelimit_print_init()in
> Native AER case.
> 
> Test with AER inject:
> Set the DPC reporting priority in the BIOS and send
> MalfTLP(AER FATAL ERROR) to device.
> 
> -- Error log normal (line breaks adjusted)
> [ 5366.943807] pcieport 0000:20:00.0: DPC: containment event,
> status:0x1f11: unmasked uncorrectable error detected
> [ 5366.943826] pcieport 0000:20:00.0: PCIe Bus Error:
> severity=Uncorrectable (Fatal), type=Transaction Layer, (Receiver ID)
> [root@localhost ~]# [ 5366.943830] pcieport 0000:20:00.0:
> device [19e5:a120] error status/mask=00040000/04580000
> [ 5366.943833] pcieport 0000:20:00.0:    [18] MalfTLP   (First)
> [ 5366.943836] pcieport 0000:20:00.0: AER:   TLP Header:
> 0x00000000 0x00000000 0x00000000 0x00000000
> [ 5366.943843] nvme nvme0: frozen state error detected, reset controller
> [ 5368.156778] {2}[Hardware Error]: Hardware error from APEI Generic
> Hardware Error Source: 0
Reformat this and drop timestamps as well:

Normal error log

  pcieport 0000:20:00.0: DPC: containment event, status:0x1f11: unmasked uncorrectable error detected
  pcieport 0000:20:00.0: PCIe Bus Error: severity=Uncorrectable (Fatal), type=Transaction Layer, (Receiver ID)
  pcieport 0000:20:00.0: device [19e5:a120] error status/mask=00040000/04580000
  pcieport 0000:20:00.0:    [18] MalfTLP   (First)
  pcieport 0000:20:00.0: AER:   TLP Header: 0x00000000 0x00000000 0x00000000 0x00000000
  nvme nvme0: frozen state error detected, reset controller
  {2}[Hardware Error]: Hardware error from APEI Generic Hardware Error Source: 0

> 
> Fixes: a57f2bfb4a58 ("PCI/AER: Ratelimit correctable and non-fatal error logging")
> Signed-off-by: Sizhe Liu <liusizhe5@huawei.com>

Otherwise looks good to me.

Thanks,

Jonathan