[PATCH 0/8] phy: zynqmp: Perform complete initialization, including ILL calibration

Sean Anderson
2026-02-03T00:21:46Z

This series completely initializes the GTRs in Linux, making all
bootloader initialization (as performed by init_serdes() in
psu_init_gpl.c) optional. This gives the following advantages:

- On some boards (mine) the reference clocks may not be configured in
SPL/FSBL. So ILL calibration will fail (and take a long time to do so)
unless we defer initialization to U-Boot/Linux where the phy driver
can request the clocks.
- If PCIe/SATA are not used in U-Boot, ILL calibration can be deferred
until Linux when it can be done it parallel with other initialization.
- We will have flexibility to switch between different configurations at
runtime. For example, this could allow supporting both SATA and PCIe M.2
cards with [1].

I have tested this series with DP, PCIe, SGMII, and SATA. USB3 is broken
on my dev board at the moment (independent of this series; need to
investigate) so I have not tested that. I have an equivalent set of
patches for U-Boot that I will try to post soon.

[1] https://lore.kernel.org/linux-pci/20260107-pci-m2-v5-0-8173d8a72641@oss.qualcomm.com/

Sean Anderson (8):
dt-bindings: pci: xilinx-nwl: Add resets
phy: zynqmp: Refactor bus width configuration into helper
phy: zynqmp: Refactor common phy initialization into a helper
phy: zynqmp: Calibrate ILL if necessary
phy: zynqmp: Initialize chicken bits
PCI: xilinx-nwl: Split phy_init from phy_power_on
PCI: xilinx-nwl: Reset the core during probe
arm64: zynqmp: Add PCIe resets

.../bindings/pci/xlnx,nwl-pcie.yaml | 17 +
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 +
drivers/pci/controller/pcie-xilinx-nwl.c | 255 +++++++--
drivers/phy/xilinx/phy-zynqmp.c | 487 +++++++++++++++++-
4 files changed, 713 insertions(+), 50 deletions(-)

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2.35.1.1320.gc452695387.dirty