* [PATCH 1/1] PCI/bwctrl: Disable BW controller on Intel P45 using a quirk
@ 2026-01-16 13:15 Ilpo Järvinen
2026-02-06 22:59 ` Bjorn Helgaas
2026-03-16 14:43 ` Roland Ziegler
0 siblings, 2 replies; 3+ messages in thread
From: Ilpo Järvinen @ 2026-01-16 13:15 UTC (permalink / raw)
To: Ilpo Järvinen, Bjorn Helgaas, linux-pci, linux-kernel; +Cc: Adam Stylinski
The commit 665745f27487 ("PCI/bwctrl: Re-add BW notification portdrv as
PCIe BW controller") was found to lead to a boot hang on a Intel P45
system. Testing without setting Link Bandwidth Management Interrupt
Enable (LBMIE) and Link Autonomous Bandwidth Interrupt Enable (LABIE)
(PCIe r7.0, sec. 7.5.3.7) in bwctrl allowed system to come up.
P45 is very old chipset and supports only up to gen2 PCIe, so not
having bwctrl does not seem a huge defiancy.
Add no_bw_notif into the struct pci_dev and quirk Intel P45 Root Port
with it.
Reported-by: Adam Stylinski <kungfujesus06@gmail.com>
Link: https://lore.kernel.org/linux-pci/aUCt1tHhm_-XIVvi@eggsbenedict/
Tested-by: Adam Stylinski <kungfujesus06@gmail.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
---
drivers/pci/pcie/bwctrl.c | 3 +++
drivers/pci/quirks.c | 10 ++++++++++
include/linux/pci.h | 1 +
3 files changed, 14 insertions(+)
diff --git a/drivers/pci/pcie/bwctrl.c b/drivers/pci/pcie/bwctrl.c
index 36f939f23d34..4ae92c9f912a 100644
--- a/drivers/pci/pcie/bwctrl.c
+++ b/drivers/pci/pcie/bwctrl.c
@@ -250,6 +250,9 @@ static int pcie_bwnotif_probe(struct pcie_device *srv)
struct pci_dev *port = srv->port;
int ret;
+ if (port->no_bw_notif)
+ return -ENODEV;
+
/* Can happen if we run out of bus numbers during enumeration. */
if (!port->subordinate)
return -ENODEV;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index b9c252aa6fe0..6ef42a2c4831 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1359,6 +1359,16 @@ static void quirk_transparent_bridge(struct pci_dev *dev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82380FB, quirk_transparent_bridge);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge);
+/*
+ * Enabling Link Bandwidth Management Interrupts (BW notifications) can cause
+ * boot hangs on P45.
+ */
+static void quirk_p45_bw_notifications(struct pci_dev *dev)
+{
+ dev->no_bw_notif = 1;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e21, quirk_p45_bw_notifications);
+
/*
* Common misconfiguration of the MediaGX/Geode PCI master that will reduce
* PCI bandwidth from 70MB/s to 25MB/s. See the GXM/GXLV/GX1 datasheets
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 864775651c6f..3a556cd749e3 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -406,6 +406,7 @@ struct pci_dev {
user sysfs */
unsigned int clear_retrain_link:1; /* Need to clear Retrain Link
bit manually */
+ unsigned int no_bw_notif:1; /* BW notifications may cause issues */
unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */
unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
--
2.39.5
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] PCI/bwctrl: Disable BW controller on Intel P45 using a quirk
2026-01-16 13:15 [PATCH 1/1] PCI/bwctrl: Disable BW controller on Intel P45 using a quirk Ilpo Järvinen
@ 2026-02-06 22:59 ` Bjorn Helgaas
2026-03-16 14:43 ` Roland Ziegler
1 sibling, 0 replies; 3+ messages in thread
From: Bjorn Helgaas @ 2026-02-06 22:59 UTC (permalink / raw)
To: Ilpo Järvinen; +Cc: Bjorn Helgaas, linux-pci, linux-kernel, Adam Stylinski
On Fri, Jan 16, 2026 at 03:15:12PM +0200, Ilpo Järvinen wrote:
> The commit 665745f27487 ("PCI/bwctrl: Re-add BW notification portdrv as
> PCIe BW controller") was found to lead to a boot hang on a Intel P45
> system. Testing without setting Link Bandwidth Management Interrupt
> Enable (LBMIE) and Link Autonomous Bandwidth Interrupt Enable (LABIE)
> (PCIe r7.0, sec. 7.5.3.7) in bwctrl allowed system to come up.
>
> P45 is very old chipset and supports only up to gen2 PCIe, so not
> having bwctrl does not seem a huge defiancy.
>
> Add no_bw_notif into the struct pci_dev and quirk Intel P45 Root Port
> with it.
>
> Reported-by: Adam Stylinski <kungfujesus06@gmail.com>
> Link: https://lore.kernel.org/linux-pci/aUCt1tHhm_-XIVvi@eggsbenedict/
> Tested-by: Adam Stylinski <kungfujesus06@gmail.com>
> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Applied to pci/bwctrl for v6.20, thanks!
> ---
> drivers/pci/pcie/bwctrl.c | 3 +++
> drivers/pci/quirks.c | 10 ++++++++++
> include/linux/pci.h | 1 +
> 3 files changed, 14 insertions(+)
>
> diff --git a/drivers/pci/pcie/bwctrl.c b/drivers/pci/pcie/bwctrl.c
> index 36f939f23d34..4ae92c9f912a 100644
> --- a/drivers/pci/pcie/bwctrl.c
> +++ b/drivers/pci/pcie/bwctrl.c
> @@ -250,6 +250,9 @@ static int pcie_bwnotif_probe(struct pcie_device *srv)
> struct pci_dev *port = srv->port;
> int ret;
>
> + if (port->no_bw_notif)
> + return -ENODEV;
> +
> /* Can happen if we run out of bus numbers during enumeration. */
> if (!port->subordinate)
> return -ENODEV;
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index b9c252aa6fe0..6ef42a2c4831 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -1359,6 +1359,16 @@ static void quirk_transparent_bridge(struct pci_dev *dev)
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82380FB, quirk_transparent_bridge);
> DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge);
>
> +/*
> + * Enabling Link Bandwidth Management Interrupts (BW notifications) can cause
> + * boot hangs on P45.
> + */
> +static void quirk_p45_bw_notifications(struct pci_dev *dev)
> +{
> + dev->no_bw_notif = 1;
> +}
> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e21, quirk_p45_bw_notifications);
> +
> /*
> * Common misconfiguration of the MediaGX/Geode PCI master that will reduce
> * PCI bandwidth from 70MB/s to 25MB/s. See the GXM/GXLV/GX1 datasheets
> diff --git a/include/linux/pci.h b/include/linux/pci.h
> index 864775651c6f..3a556cd749e3 100644
> --- a/include/linux/pci.h
> +++ b/include/linux/pci.h
> @@ -406,6 +406,7 @@ struct pci_dev {
> user sysfs */
> unsigned int clear_retrain_link:1; /* Need to clear Retrain Link
> bit manually */
> + unsigned int no_bw_notif:1; /* BW notifications may cause issues */
> unsigned int d3hot_delay; /* D3hot->D0 transition time in ms */
> unsigned int d3cold_delay; /* D3cold->D0 transition time in ms */
>
>
> base-commit: 8f0b4cce4481fb22653697cced8d0d04027cb1e8
> --
> 2.39.5
>
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH 1/1] PCI/bwctrl: Disable BW controller on Intel P45 using a quirk
2026-01-16 13:15 [PATCH 1/1] PCI/bwctrl: Disable BW controller on Intel P45 using a quirk Ilpo Järvinen
2026-02-06 22:59 ` Bjorn Helgaas
@ 2026-03-16 14:43 ` Roland Ziegler
1 sibling, 0 replies; 3+ messages in thread
From: Roland Ziegler @ 2026-03-16 14:43 UTC (permalink / raw)
To: Ilpo Järvinen, Bjorn Helgaas, linux-pci, linux-kernel; +Cc: Adam Stylinski
On Fri, 16 Mar 2026 13:15:13 +0100, Ilpo Jarvinen wrote:
> The commit 665745f27487 ("PCI/bwctrl: Re-add BW notification portdrv as
> PCIe BW controller") was found to lead to a boot hang on a Intel P45
> system. Testing without setting Link Bandwidth Management Interrupt
> Enable (LBMIE) and Link Autonomous Bandwidth Interrupt Enable (LABIE)
> in bwctrl allowed system to come up.
>
> Add no_bw_notif into the struct pci_dev and quirk Intel P45 Root Port
> with it.
The commit 665745f27487 re-added BW notification support in bwctrl,
but on Intel P45 root ports it can cause a boot hang when both LBMIE
and LABIE are enabled.
This patch modifies bwctrl to allow the interrupts safely. For ports
marked no_bw_notif, each interrupt is enabled separately, preventing
the hang while keeping BW notifications functional.
Patch has been tested since kernel v6.13 on P45 hardware without issues.
---
Patch:
--- a/drivers/pci/pcie/bwctrl.c
+++ b/drivers/pci/pcie/bwctrl.c
@@ -190,8 +190,13 @@
if (ret == PCIBIOS_SUCCESSFUL && link_status & PCI_EXP_LNKSTA_LBMS)
set_bit(PCI_LINK_LBMS_SEEN, &port->priv_flags);
- pcie_capability_set_word(port, PCI_EXP_LNKCTL,
- PCI_EXP_LNKCTL_LBMIE | PCI_EXP_LNKCTL_LABIE);
+ if (port->no_bw_notif) {
+ pcie_capability_set_word(port, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_LBMIE);
+ pcie_capability_set_word(port, PCI_EXP_LNKCTL, PCI_EXP_LNKCTL_LABIE);
+ } else
+ pcie_capability_set_word(port, PCI_EXP_LNKCTL,
+ PCI_EXP_LNKCTL_LBMIE | PCI_EXP_LNKCTL_LABIE);
+
pcie_capability_write_word(port, PCI_EXP_LNKSTA,
PCI_EXP_LNKSTA_LBMS | PCI_EXP_LNKSTA_LABS);
@@ -250,9 +255,6 @@
struct pci_dev *port = srv->port;
int ret;
- if (port->no_bw_notif)
- return -ENODEV;
-
/* Can happen if we run out of bus numbers during enumeration. */
if (!port->subordinate)
return -ENODEV;
Fixes: 665745f27487 ("PCI/bwctrl: Re-add BW notification portdrv as PCIe BW controller")
Link: https://lore.kernel.org/lkml/20260116131513.2359-1-ilpo.jarvinen@linux.intel.com/
Signed-off-by: Roland <ea3393@fen-net.de>
^ permalink raw reply [flat|nested] 3+ messages in thread
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2026-01-16 13:15 [PATCH 1/1] PCI/bwctrl: Disable BW controller on Intel P45 using a quirk Ilpo Järvinen
2026-02-06 22:59 ` Bjorn Helgaas
2026-03-16 14:43 ` Roland Ziegler
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