[PATCH v5 7/7] Documentation: ABI: Add CXL PCI cxl_reset sysfs attribute

[<smadhavan@nvidia.com>]

From: Srirangan Madhavan <smadhavan@nvidia.com>

Document the cxl_reset sysfs attribute added to PCI devices that
support CXL Reset.

Signed-off-by: Srirangan Madhavan <smadhavan@nvidia.com>
---
 Documentation/ABI/testing/sysfs-bus-pci | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-bus-pci b/Documentation/ABI/testing/sysfs-bus-pci
index b767db2c52cb..d67c733626b8 100644
--- a/Documentation/ABI/testing/sysfs-bus-pci
+++ b/Documentation/ABI/testing/sysfs-bus-pci
@@ -174,6 +174,28 @@ Description:
 		similiar to writing 1 to their individual "reset" file, so use
 		with caution.

+What:		/sys/bus/pci/devices/.../cxl_reset
+Date:		February 2026
+Contact:	linux-cxl@vger.kernel.org
+Description:
+		This attribute is only visible when the device advertises
+		CXL Reset Capable in the CXL DVSEC Capability register
+		(CXL r3.2, section 8.1.3).
+
+		Writing 1 to this file triggers a CXL device reset which
+		affects CXL.cache and CXL.mem state on all CXL functions
+		(i.e. those not listed in the Non-CXL Function Map DVSEC,
+		section 8.1.4), not just CXL.io/PCIe state.  This is
+		separate from the standard PCI reset interface because CXL
+		Reset has different scope.
+
+		The reset will fail with -EBUSY if any CXL regions using this
+		device have drivers bound.  Active regions are torn down as
+		part of the reset sequence.
+
+		This attribute is registered by the CXL core when a CXL device
+		is discovered, independent of which driver binds the PCI device.
+
 What:		/sys/bus/pci/devices/.../vpd
 Date:		February 2008
 Contact:	Ben Hutchings <bwh@kernel.org>
--
2.43.0