Re: [PATCH v2 3/5] dt-bindings: pci: Document the NVIDIA Tegra264 PCIe controller

Thierry Reding
2026-04-02T11:54:44Z

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On Tue, Mar 24, 2026 at 08:24:53PM -0500, Rob Herring (Arm) wrote:
>
> On Fri, 20 Mar 2026 23:54:35 +0100, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> >
> > The six PCIe controllers found on Tegra264 are of two types: one is used
> > for the internal GPU and therefore is not connected to a UPHY and the
> > remaining five controllers are typically routed to a PCI slot and have
> > additional controls for the physical link.
> >
> > While these controllers can be switched into endpoint mode, this binding
> > describes the root complex mode only.
> >
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > Changes in v2:
> > - move ECAM region first and unify C0 vs. C1-C5
> > - move unevaluatedProperties to right before the examples
> > - add description to clarify the two types of controllers
> > - add examples for C0 and C1-C5
> >
> > .../bindings/pci/nvidia,tegra264-pcie.yaml | 149 ++++++++++++++++++
> > 1 file changed, 149 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/pci/nvidia,tegra264-pcie.yaml
> >
>
> Reviewed-by: Rob Herring (Arm) <robh@kernel.org>

Unfortunately making the ECAM region the first entry causes the DTC to
emit a couple of simple_bus_reg warnings, as seen in some more pedantic
build tests. I'll revert this back to the oneOf construct from v1.

Thierry

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