Re: Fwd: [Bug 221457] New: PCI core drops Resizable BAR sizing after ASPM common-clock reconfiguration on Thunderbolt/USB4 hot-plug link

[Mika Westerberg <mika.westerberg@linux.intel.com>]

Hi,

On Wed, May 06, 2026 at 03:26:43PM +0300, Ilpo Järvinen wrote:
> On Wed, 6 May 2026, stuck-tamer-growl@duck.com wrote:
> 
> > Bjorn and All,
> > 
> > Attached 
> > 
> > pristine.dmesg.txt and pristine.lspci-vv.txt                                                                  
> > cmdline "quiet splash", same kernel/hardware as the report.                                                                    
> >                                                                                                                                         
> > Many thanks!
> > 
> > Peter / stuck-tamer-growl
> > 
> > 
> > 
> > On Monday, May 4th, 2026 at 2:43 PM, Bjorn Helgaas <helgaas_at_kernel.org_stuck-tamer-growl@duck.com> wrote:
> > 
> > > [+bcc reporter]
> > > 
> > > On Mon, May 04, 2026 at 01:29:28PM -0500, Bjorn Helgaas wrote:
> > > > ---------- Forwarded message ---------
> > > > https://bugzilla.kernel.org/show_bug.cgi?id=221457
> > > > ...
> > > > SUMMARY
> > > >
> > > > Initial PCI enumeration assigns BAR 1 = 16 GB on an RTX 5060 Ti behind a
> > > > Thunderbolt 4 link. Shortly after, the pcieport ASPM service runs a
> > > > common-clock reconfigure on the host root port, the downstream bridges go
> > > > through [bus 00-00] reset and re-enumeration, and BAR 1 is reassigned at 256
> > > > MB.
> > > 
> > > stuck-tamer-growl: Thanks for the report.  Would you mind collect the
> > > complete dmesg log and the output of "sudo lspci -vv" and posting them
> > > here (or in the bugzilla if you prefer)?
> 
> Hi,
> 
> To me it looks the ASPM/CCC is a red herring (or another problem unrelated 
> to the ReBAR size issue).
> 
> What happens here is the entire PCIe topology is reset:
> 
> [    1.121434] kernel: pcieport 0000:00:07.2: pciehp: Slot(14): Link Down
> [    1.121439] kernel: pcieport 0000:00:07.2: pciehp: Slot(14): Card not present
> [    5.804638] kernel: pcieport 0000:00:07.2: pciehp: Slot(14): Card present
> [    5.804643] kernel: pcieport 0000:00:07.2: pciehp: Slot(14): Link Up
> 
> I recalled Mika Westerberg mentioned some time back Thunderbolt is 
> starting to reset things on boot so this might be related to that.
> 
> As the hotplug tears down everything on PCI side, there's nothing to hold 
> the ReBAR size information across as far as PCI core is concerned.
> 
> Thunderbolt reset on boot was (probably) introduced by this commit:
> 
> 59a54c5f3dbd ("thunderbolt: Reset topology created by the boot firmware")
> 
> 
> I don't know if the nvidia out-of-tree driver does attempt BAR resize on 
> its own (some in-kernel GPU driver do on their own outside of PCI core's 
> resource fitting algorithm). At least there's no indication in the log 
> that would point to even a resize attempt happening.
> 
> 
> My resizable BAR aware resource fitting would eventually solve this but 
> it's not yet ready. I'm currently trying to fix pci=realloc not detecting 
> need to resize anything if the current ReBAR size fits just fine.

One temporary workaround until your code is ready is passing
"thunderbolt.host_reset=0" in the command line. That will skip the reset.