From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from canpmsgout10.his.huawei.com (canpmsgout10.his.huawei.com [113.46.200.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33F5733260E; Fri, 8 May 2026 06:41:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=113.46.200.225 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778222471; cv=none; b=kZoA09Vj2hMGQjIYFi6Zys9fU4Gwqsvcf2dQfCzqgXJIkJgle1Jtb82VjI6FpaHQdh3sBv6RRB9IQrJY+nEC5PBA0XV8sPF4k6dpp+2QNtqspPCHAzAptLgU7WBNyGMw9X9im9zGwBdnlT5dx1LfU7CCfg6WgWSZiWpYcB7e0Oc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1778222471; c=relaxed/simple; bh=nZ77Qx15FQjlfkQiv1WNBEd+bTaQpuNpy4fkczqNe0s=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=hNZNKuR2aV5vUEdX3kBS/XjYn9NCZBDF54A+R0Et/uTScVn58Q5W1Ke+IpTVbL8FXxSF5hm8BLF1QHl8ZY2Y/AHDmVwFEig5RPB+Obsn+6d44NLvi0qguX5tPjAAjDY4u427ai+xZRc9bM99vxLLezHVEEg4tZzhDIYFxF79tWo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com; spf=pass smtp.mailfrom=huawei.com; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b=ui3JM8fR; arc=none smtp.client-ip=113.46.200.225 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=huawei.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=huawei.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=huawei.com header.i=@huawei.com header.b="ui3JM8fR" dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=5ZWpG5nAH4Ms4MOMRfRox3bKTRlzC2EutZldfGVDmEw=; b=ui3JM8fRTPCUjKUiUWGi+71kvtIRzOJRK/ShoXbYFzCuZM1S7+4TxymHYm++XU8yyP/YIb1fm v4Lr6EqZ5/7B5qpTmFPjapXn23zi7ptKQklh2GoILnndCzlQl1gHMNRPoORCJeiJa1fL8/DS0NL RiD/nSu0kEIHw23bhrPqNuA= Received: from mail.maildlp.com (unknown [172.19.163.15]) by canpmsgout10.his.huawei.com (SkyGuard) with ESMTPS id 4gBfT534GFz1K97g; Fri, 8 May 2026 14:33:29 +0800 (CST) Received: from kwepemk500009.china.huawei.com (unknown [7.202.194.94]) by mail.maildlp.com (Postfix) with ESMTPS id 04A9740539; Fri, 8 May 2026 14:41:02 +0800 (CST) Received: from localhost.localdomain (10.50.163.32) by kwepemk500009.china.huawei.com (7.202.194.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 8 May 2026 14:41:01 +0800 From: Chengwen Feng To: , CC: , , , , , , , Subject: [PATCH v8 2/7] PCI/TPH: Export pcie_tph_get_st_modes() for external use Date: Fri, 8 May 2026 14:40:48 +0800 Message-ID: <20260508064053.37529-3-fengchengwen@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20260508064053.37529-1-fengchengwen@huawei.com> References: <20260508064053.37529-1-fengchengwen@huawei.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain X-ClientProxiedBy: kwepems100002.china.huawei.com (7.221.188.206) To kwepemk500009.china.huawei.com (7.202.194.94) Export the helper to retrieve supported PCIe TPH steering tag modes so that drivers like VFIO can query and expose device capabilities to userspace. Add stub functions for pcie_tph_get_st_table_size() and pcie_tph_get_st_table_loc() when !CONFIG_PCIE_TPH. Add tph_cap validation for pcie_tph_get_st_modes() and pcie_tph_get_st_table_loc() to prevent invalid PCI configuration space access when TPH is not supported. Signed-off-by: Chengwen Feng Acked-by: Bjorn Helgaas --- drivers/pci/tph.c | 19 +++++++++++++++++-- include/linux/pci-tph.h | 7 +++++++ 2 files changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/pci/tph.c b/drivers/pci/tph.c index 877cf556242b..ba31b010f67a 100644 --- a/drivers/pci/tph.c +++ b/drivers/pci/tph.c @@ -145,15 +145,27 @@ static void set_ctrl_reg_req_en(struct pci_dev *pdev, u8 req_type) pci_write_config_dword(pdev, pdev->tph_cap + PCI_TPH_CTRL, reg); } -static u8 get_st_modes(struct pci_dev *pdev) +/** + * pcie_tph_get_st_modes - Get supported Steering Tag modes + * @pdev: PCI device to query + * + * Return: + * Bitmask of supported ST modes (PCI_TPH_CAP_ST_NS, PCI_TPH_CAP_ST_IV, + * PCI_TPH_CAP_ST_DS) + */ +u8 pcie_tph_get_st_modes(struct pci_dev *pdev) { u32 reg; + if (!pdev->tph_cap) + return 0; + pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CAP, ®); reg &= PCI_TPH_CAP_ST_NS | PCI_TPH_CAP_ST_IV | PCI_TPH_CAP_ST_DS; return reg; } +EXPORT_SYMBOL(pcie_tph_get_st_modes); /** * pcie_tph_get_st_table_loc - Return the device's ST table location @@ -168,6 +180,9 @@ u32 pcie_tph_get_st_table_loc(struct pci_dev *pdev) { u32 reg; + if (!pdev->tph_cap) + return PCI_TPH_LOC_NONE; + pci_read_config_dword(pdev, pdev->tph_cap + PCI_TPH_CAP, ®); return reg & PCI_TPH_CAP_LOC_MASK; @@ -395,7 +410,7 @@ int pcie_enable_tph(struct pci_dev *pdev, int mode) /* Sanitize and check ST mode compatibility */ mode &= PCI_TPH_CTRL_MODE_SEL_MASK; - dev_modes = get_st_modes(pdev); + dev_modes = pcie_tph_get_st_modes(pdev); if (!((1 << mode) & dev_modes)) return -EINVAL; diff --git a/include/linux/pci-tph.h b/include/linux/pci-tph.h index be68cd17f2f8..5772d48ea444 100644 --- a/include/linux/pci-tph.h +++ b/include/linux/pci-tph.h @@ -30,6 +30,7 @@ void pcie_disable_tph(struct pci_dev *pdev); int pcie_enable_tph(struct pci_dev *pdev, int mode); u16 pcie_tph_get_st_table_size(struct pci_dev *pdev); u32 pcie_tph_get_st_table_loc(struct pci_dev *pdev); +u8 pcie_tph_get_st_modes(struct pci_dev *pdev); #else static inline int pcie_tph_set_st_entry(struct pci_dev *pdev, unsigned int index, u16 tag) @@ -41,6 +42,12 @@ static inline int pcie_tph_get_cpu_st(struct pci_dev *dev, static inline void pcie_disable_tph(struct pci_dev *pdev) { } static inline int pcie_enable_tph(struct pci_dev *pdev, int mode) { return -EINVAL; } +static inline u16 pcie_tph_get_st_table_size(struct pci_dev *pdev) +{ return 0; } +static inline u32 pcie_tph_get_st_table_loc(struct pci_dev *pdev) +{ return 0; } +static inline u8 pcie_tph_get_st_modes(struct pci_dev *pdev) +{ return 0; } #endif #endif /* LINUX_PCI_TPH_H */ -- 2.17.1