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From: sashiko-bot@kernel.org
To: "Jose Ignacio Tornos Martinez" <jtornosm@redhat.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v8 2/3] PCI: Add device-specific reset for Qualcomm devices
Date: Tue, 09 Jun 2026 17:11:41 +0000	[thread overview]
Message-ID: <20260609171141.7E13F1F00893@smtp.kernel.org> (raw)
In-Reply-To: <20260609163649.319755-3-jtornosm@redhat.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The newly extracted `pci_dev_d3cold_d0_cycle()` helper, and thus the new device-specific method `reset_d3cold_d3hot()`, fails to wait for device readiness after transitioning the device to D0.
--

commit f0c27acd50ba34288a06f87ab1b9a8e74f06aba2
Author: Jose Ignacio Tornos Martinez <jtornosm@redhat.com>

PCI: Add device-specific reset for Qualcomm devices

This commit adds device-specific reset entries for several Qualcomm PCIe
devices that lack working reset methods. It implements a reset via D3cold
power cycling with automatic D3hot fallback, extracting a shared
pci_dev_d3cold_d0_cycle() helper for this purpose.

> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 096868f80cd4c..f7a7443287fdf 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c

[ ... ]

> +int pci_dev_d3cold_d0_cycle(struct pci_dev *dev)
> +{
> +	int ret;
> +
> +	if (dev->current_state != PCI_D0)
> +		return -EINVAL;
> +
> +	ret = pci_set_power_state(dev, PCI_D3cold);
> +	if (ret)
> +		return ret;
> +
> +	return pci_set_power_state(dev, PCI_D0);
> +}

[Severity: High]
Is there a missing wait for device readiness after transitioning to D0?

Standard reset implementations like pci_pm_reset() explicitly call
pci_dev_wait() after setting D0 to ensure the device has finished its
internal reset:

pci_pm_reset() {
    ...
    csr |= PCI_D0;
    pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
    pci_dev_d3_sleep(dev);
    ret = pci_dev_wait(dev, "PM D3hot->D0", PCIE_RESET_READY_POLL_MS);
    ...
}

Without this wait, does pci_dev_d3cold_d0_cycle() return before the
device is fully ready? If the caller (like VFIO via pci_reset_function)
immediately proceeds to restore the device's config space and BARs, could
those configuration writes be dropped or hit Configuration Request Retry
Status (CRS), leaving the device unconfigured?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609163649.319755-1-jtornosm@redhat.com?part=2

  reply	other threads:[~2026-06-09 17:11 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-09 16:36 [PATCH v8 0/3] PCI: Add d3cold and device-specific reset for Qualcomm devices Jose Ignacio Tornos Martinez
2026-06-09 16:36 ` [PATCH v8 1/3] PCI: Add d3cold as general reset method Jose Ignacio Tornos Martinez
2026-06-09 16:56   ` sashiko-bot
2026-06-09 16:36 ` [PATCH v8 2/3] PCI: Add device-specific reset for Qualcomm devices Jose Ignacio Tornos Martinez
2026-06-09 17:11   ` sashiko-bot [this message]
2026-06-09 17:53   ` Alex Williamson
2026-06-09 16:36 ` [PATCH v8 3/3] PCI: Disable broken bus reset on " Jose Ignacio Tornos Martinez

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