From: sashiko-bot@kernel.org
To: "Jia Wang via B4 Relay" <devnull+wangjia.ultrarisc.com@kernel.org>
Cc: conor+dt@kernel.org, robh@kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 1/2] dt-bindings: pci: ultrarisc: add required DP1000 PCIe clocks
Date: Mon, 29 Jun 2026 08:07:16 +0000 [thread overview]
Message-ID: <20260629080717.0A0B11F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260629-ultrarisc-pci-clk-v1-1-5ea3308fdab3@ultrarisc.com>
> From: Jia Wang <wangjia@ultrarisc.com>
>
> Require the DP1000 PCIe controller nodes to provide clocks and
> clock-names, using the standard DesignWare clock names "core",
> "dbi", and "aux".
>
> Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260629-ultrarisc-pci-clk-v1-0-5ea3308fdab3@ultrarisc.com?part=1
next prev parent reply other threads:[~2026-06-29 8:07 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-29 5:59 [PATCH 0/2] PCI: ultrarisc: Add DP1000 PCIe clock support Jia Wang via B4 Relay
2026-06-29 5:59 ` [PATCH 1/2] dt-bindings: pci: ultrarisc: add required DP1000 PCIe clocks Jia Wang via B4 Relay
2026-06-29 8:07 ` sashiko-bot [this message]
2026-06-29 15:27 ` Conor Dooley
2026-06-29 5:59 ` [PATCH 2/2] PCI: ultrarisc: get and enable " Jia Wang via B4 Relay
2026-06-29 6:09 ` sashiko-bot
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