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Peter Anvin" , linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)) Subject: [PATCH 4/8] x86/pci: move SiS chipset quirks to arch/x86/pci/fixup.c Date: Tue, 7 Jul 2026 15:17:56 -0700 Message-ID: <20260707221800.920270-5-rosenp@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260707221800.920270-1-rosenp@gmail.com> References: <20260707221800.920270-1-rosenp@gmail.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Move SiS-specific PCI quirk handlers from drivers/pci/quirks.c to arch/x86/pci/fixup.c: - SiS 5597/496 PCI-PCI transfer disable (quirk_nopcipci) - SiS 96x south bridge SMBus enable (quirk_sis_96x_smbus) - SiS 85C503/5513 SMBus detection (quirk_sis_503) Assisted-by: opencode:big-pickle Signed-off-by: Rosen Penev --- arch/x86/pci/fixup.c | 64 ++++++++++++++++++++++++++++++++++++++++++++ drivers/pci/quirks.c | 64 -------------------------------------------- 2 files changed, 64 insertions(+), 64 deletions(-) diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index 81f9cd5d9885..035723d2cb64 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -1991,3 +1991,67 @@ static void quirk_via_cx700_pci_parking_caching(struct pci_dev *dev) } } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching); + +/* Chipsets where PCI->PCI transfers vanish or hang */ +static void quirk_nopcipci(struct pci_dev *dev) +{ + if ((pci_pci_problems & PCIPCI_FAIL) == 0) { + pci_info(dev, "Disabling direct PCI/PCI transfers\n"); + pci_pci_problems |= PCIPCI_FAIL; + } +} +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, quirk_nopcipci); +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, quirk_nopcipci); + +/* SiS 96x south bridge: BIOS typically hides SMBus device... */ +static void quirk_sis_96x_smbus(struct pci_dev *dev) +{ + u8 val = 0; + pci_read_config_byte(dev, 0x77, &val); + if (val & 0x10) { + pci_info(dev, "Enabling SiS 96x SMBus\n"); + pci_write_config_byte(dev, 0x77, val & ~0x10); + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus); +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus); +DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus); +DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus); +DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus); +DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus); + +/* + * ... This is further complicated by the fact that some SiS96x south + * bridges pretend to be 85C503/5513 instead. In that case see if we + * spotted a compatible north bridge to make sure. + * (pci_find_device() doesn't work yet) + * + * We can also enable the sis96x bit in the discovery register.. + */ +#define SIS_DETECT_REGISTER 0x40 + +static void quirk_sis_503(struct pci_dev *dev) +{ + u8 reg; + u16 devid; + + pci_read_config_byte(dev, SIS_DETECT_REGISTER, ®); + pci_write_config_byte(dev, SIS_DETECT_REGISTER, reg | (1 << 6)); + pci_read_config_word(dev, PCI_DEVICE_ID, &devid); + if (((devid & 0xfff0) != 0x0960) && (devid != 0x0018)) { + pci_write_config_byte(dev, SIS_DETECT_REGISTER, reg); + return; + } + + /* + * Ok, it now shows up as a 96x. Run the 96x quirk by hand in case + * it has already been processed. (Depends on link order, which is + * apparently not guaranteed) + */ + dev->device = devid; + quirk_sis_96x_smbus(dev); +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503); +DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503); diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index e8813811d935..71df81882049 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -364,17 +364,6 @@ static void quirk_tigerpoint_bm_sts(struct pci_dev *dev) DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TGP_LPC, quirk_tigerpoint_bm_sts); #endif -/* Chipsets where PCI->PCI transfers vanish or hang */ -static void quirk_nopcipci(struct pci_dev *dev) -{ - if ((pci_pci_problems & PCIPCI_FAIL) == 0) { - pci_info(dev, "Disabling direct PCI/PCI transfers\n"); - pci_pci_problems |= PCIPCI_FAIL; - } -} -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5597, quirk_nopcipci); -DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_496, quirk_nopcipci); - static void quirk_nopciamd(struct pci_dev *dev) { u8 rev; @@ -1117,59 +1106,6 @@ DECLARE_PCI_FIXUP_SUSPEND(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6_resume); DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, asus_hides_smbus_lpc_ich6_resume_early); -/* SiS 96x south bridge: BIOS typically hides SMBus device... */ -static void quirk_sis_96x_smbus(struct pci_dev *dev) -{ - u8 val = 0; - pci_read_config_byte(dev, 0x77, &val); - if (val & 0x10) { - pci_info(dev, "Enabling SiS 96x SMBus\n"); - pci_write_config_byte(dev, 0x77, val & ~0x10); - } -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus); -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus); -DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_961, quirk_sis_96x_smbus); -DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_962, quirk_sis_96x_smbus); -DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_963, quirk_sis_96x_smbus); -DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_LPC, quirk_sis_96x_smbus); - -/* - * ... This is further complicated by the fact that some SiS96x south - * bridges pretend to be 85C503/5513 instead. In that case see if we - * spotted a compatible north bridge to make sure. - * (pci_find_device() doesn't work yet) - * - * We can also enable the sis96x bit in the discovery register.. - */ -#define SIS_DETECT_REGISTER 0x40 - -static void quirk_sis_503(struct pci_dev *dev) -{ - u8 reg; - u16 devid; - - pci_read_config_byte(dev, SIS_DETECT_REGISTER, ®); - pci_write_config_byte(dev, SIS_DETECT_REGISTER, reg | (1 << 6)); - pci_read_config_word(dev, PCI_DEVICE_ID, &devid); - if (((devid & 0xfff0) != 0x0960) && (devid != 0x0018)) { - pci_write_config_byte(dev, SIS_DETECT_REGISTER, reg); - return; - } - - /* - * Ok, it now shows up as a 96x. Run the 96x quirk by hand in case - * it has already been processed. (Depends on link order, which is - * apparently not guaranteed) - */ - dev->device = devid; - quirk_sis_96x_smbus(dev); -} -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503); -DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503, quirk_sis_503); - #if defined(CONFIG_ATA) || defined(CONFIG_ATA_MODULE) /* -- 2.55.0