Re: [PATCH v11] PCI: Add device-specific reset for Qualcomm devices

[kernel test robot <lkp@intel.com>]

Hi Jose,

kernel test robot noticed the following build warnings:

[auto build test WARNING on pci/next]
[also build test WARNING on pci/for-linus linus/master v7.2-rc6 next-20260807]
[cannot apply to linux-review/Jose-Ignacio-Tornos-Martinez/Add-device-specific-reset-for-Qualcomm-devices/20260804-001013]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Jose-Ignacio-Tornos-Martinez/PCI-Add-device-specific-reset-for-Qualcomm-devices/20260810-131417
base:   https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next
patch link:    https://lore.kernel.org/r/20260626055023.197470-1-jtornosm%40redhat.com
patch subject: [PATCH v11] PCI: Add device-specific reset for Qualcomm devices
config: um-randconfig-r073-20260810 (https://download.01.org/0day-ci/archive/20260811/202608110204.wb17Qqit-lkp@intel.com/config)
compiler: gcc-14 (Debian 14.2.0-19) 14.2.0
smatch: v0.5.0-9187-g5189e3fb

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202608110204.wb17Qqit-lkp@intel.com/

smatch warnings:
drivers/pci/quirks.c:4278 reset_qualcomm_wifi() warn: always true condition '(val != (~0)) => (0-u32max != u64max)'

vim +4278 drivers/pci/quirks.c

  4234	
  4235	/*
  4236	 * Qualcomm WiFi device-specific reset using SoC global reset via BAR0
  4237	 * registers.
  4238	 */
  4239	static int reset_qualcomm_wifi(struct pci_dev *pdev, bool probe)
  4240	{
  4241		bool link_recovered = false;
  4242		unsigned long timeout;
  4243		void __iomem *bar;
  4244		u32 val;
  4245		u16 cmd;
  4246	
  4247		if (probe)
  4248			return 0;
  4249	
  4250		if (pdev->current_state != PCI_D0)
  4251			return -EINVAL;
  4252	
  4253		pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  4254		pci_write_config_word(pdev, PCI_COMMAND, cmd | PCI_COMMAND_MEMORY);
  4255	
  4256		bar = pci_iomap(pdev, 0, 0);
  4257		if (!bar) {
  4258			pci_write_config_word(pdev, PCI_COMMAND, cmd);
  4259			return -ENODEV;
  4260		}
  4261	
  4262		val = ioread32(bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET);
  4263		val |= QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET_V;
  4264		iowrite32(val, bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET);
  4265		ioread32(bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET);
  4266	
  4267		msleep(10);
  4268	
  4269		val &= ~QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET_V;
  4270		iowrite32(val, bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET);
  4271		ioread32(bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET);
  4272	
  4273		msleep(10);
  4274	
  4275		timeout = jiffies + msecs_to_jiffies(5000);
  4276		while (time_before(jiffies, timeout)) {
  4277			val = ioread32(bar + QUALCOMM_WIFI_PCIE_SOC_GLOBAL_RESET);
> 4278			if (val != PCI_ERROR_RESPONSE) {
  4279				link_recovered = true;
  4280				break;
  4281			}
  4282			msleep(20);
  4283		}
  4284	
  4285		if (!link_recovered) {
  4286			pci_err(pdev, "PCIe link failed to recover after reset\n");
  4287			goto out_restore;
  4288		}
  4289	
  4290		/* After SOC_GLOBAL_RESET, MHISTATUS may still have SYSERR bit set
  4291		 * and thus need to set MHICTRL_RESET to clear SYSERR.
  4292		 */
  4293		iowrite32(QUALCOMM_WIFI_MHICTRL_RESET_MASK, bar + QUALCOMM_WIFI_MHICTRL);
  4294		ioread32(bar + QUALCOMM_WIFI_MHICTRL);
  4295	
  4296		msleep(10);
  4297	
  4298	out_restore:
  4299		pci_iounmap(pdev, bar);
  4300		pci_write_config_word(pdev, PCI_COMMAND, cmd);
  4301	
  4302		return link_recovered ? 0 : -ETIMEDOUT;
  4303	}
  4304	

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