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From: sashiko-bot@kernel.org
To: "Hongbo Yao" <andy.xu@hj-micro.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [RFC PATCH] PCI: pciehp: Allow more time for link activation after slot power-on
Date: Thu, 10 Sep 2026 02:04:33 +0000	[thread overview]
Message-ID: <20260910020434.4C16F1F000FF@smtp.kernel.org> (raw)
In-Reply-To: <20260910015151.1876630-1-andy.xu@hj-micro.com>

> The OCP NIC 3.0 Specification, version 1.6.0, Figure 132 [1], requires
> an interval greater than one second between Main Power Valid and PERST#
> deassertion.  The diagram labels this interval T_PVPERL.  PCIe link
> activation requires additional time after PERST# is deasserted.
> 
> In the reported scenario, the adapter is already installed in a
> powered-off slot.  Pressing the Attention Button generates the event
> that causes pciehp to enable slot power and then check the link.
> The one-second DLLLA polling timeout does not account for the above
> reset hold interval when that interval overlaps the link wait, so it
> can report failure before the adapter can activate the link.
> 
> This is observed with an OCP ConnectX-7 (MT2910 family) adapter.  On the
> affected platform, power-on to PERST# deassertion takes about 1.2 seconds,
> followed by a few hundred milliseconds for link activation, exceeding
> [ ... ]
>     "Power-Up Sequencing - Normal Operation".
> 
> Link: https://www.opencompute.org/wiki/Server/NIC
> 
> Signed-off-by: Hongbo Yao <andy.xu@hj-micro.com>

Sashiko has reviewed this patch and found no issues. It looks great!

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260910015151.1876630-1-andy.xu@hj-micro.com?part=1


  reply	other threads:[~2026-09-10  2:04 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-10  1:51 [RFC PATCH] PCI: pciehp: Allow more time for link activation after slot power-on Hongbo Yao
2026-09-10  2:04 ` sashiko-bot [this message]
2026-09-13 12:24 ` Lukas Wunner

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