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Wed, 09 Sep 2026 19:19:22 -0700 (PDT) From: Alex Elder To: bhelgaas@google.com Cc: lizhi.hou@amd.com, herve.codina@bootlin.com, andrea.porta@suse.com, daniel@riscstar.com, mohdayaa@qti.qualcomm.com, lbiancon@qti.qualcomm.com, mani@kernel.org, robh@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 0/3] PCI: of: update endpoint ranges dynamically Date: Wed, 9 Sep 2026 21:19:15 -0500 Message-ID: <20260910021919.3421449-1-elder@riscstar.com> X-Mailer: git-send-email 2.53.0 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit A PCI endpoint bus is a devicetree construct that allows a PCI endpoint (function) to have sub-devices defined that are accessible in an SoC via the PCI endpoint's BARs. Such a bus is represented as a devicetree sub-node for a PCI function having the name "pci-ep-bus". There can be one or more pci-ep-bus nodes. A PCI function with a pci-ep-bus devicetree node must also define "#address-cells", "#size-cells", and "ranges" properties, to specify how endpoint bus addresses are translated to the PCI parent bus. An endpoint bus address has three cells; the first indicates which of the function's BARs the address is associated with, and the other two specify a 64-bit (2 cell) offset within the BAR's region. BAR base addresses are determined dynamically by the PCI enumeration process, so generally it's not possible to include them in a static devicetree file. When this addressing scheme was introduced, this was not a problem because the devicetree content was generated dynamically--after booting--based on the information (including BAR addresses) available following PCI enumeration. It is possible (and in some cases, necessary) to define the devicetree nodes that represent PCI devices ahead of time, in a statically-defined devicetree file. In order to support the PCI endpoint bus model in this case it is necessary to dynamically update the static devicetree so that the BAR base addresses assigned during enumeration are reflected in the endpoint's "ranges" property. This series implements that dynamic update, leveraging the same code used to create the "ranges" property when PCI_DYNAMIC_OF_NODES is enabled. The first patch makes an argument to of_pci_get_addr_flags() optional. The second patch separates the code that dynamically builds the property value into a helper function, and the last arranges for a statically-defined devicetree node for a PCI endpoint to have its "ranges" property updated (if it includes a "pci-ep-bus" sub-node).. -Alex Note: this series is built upon these patches: https://lore.kernel.org/lkml/20260908213459.2519059-1-elder@riscstar.com/ The entire series (based on v7.3-rc2 and including those prerequisites) is available here: https://github.com/riscstar/linux/tree/outgoing/dynamic_ranges-v2 Between version 1 and version 2: - Included the first patch (which was previously posted in a different series) - Modified the last patch so the ranges property is updated only for PCI endpoints having at least one "pci-ep-bus" node - Rebased on v7.3-rc2 (and the prerequisite series) Version 1 is available here: https://lore.kernel.org/lkml/20260813220717.1394644-1-elder@riscstar.com/ Alex Elder (3): PCI: of: make a flags argument optional PCI: of: introduce of_pci_build_prop_ranges() PCI: of: introduce of_pci_update_endpoint_node_ranges() drivers/pci/of.c | 89 ++++++++++++++++++++++--- drivers/pci/of_property.c | 137 +++++++++++++++++++++++++------------- drivers/pci/pci.h | 1 + 3 files changed, 173 insertions(+), 54 deletions(-) base-commit: 857c3561ea9f2c3107b5c6d830d3b3face159cbc -- 2.53.0