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charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-ORIG-GUID: MDFRsxEPcpDhkw81bb_kOQChlPs9zWrZ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTE1MDM0MSBTYWx0ZWRfXzSgKVUsS2hfi 7V20TEbt25Ir+Tx6k4EHp+etyb5oi53FgGyUfS2/kzHc+FInlTMBpIhlyzsHIUywhZg5Ltp2fHW FezH5CpjrRdqoP1BLnTb4b2x5ZcV9vqSW0t+F7Jjbwk9WIp4qmvKrtLzJsus+6QQ98nCWBatKjv 7iEU7oBY/6aZv+ao6sjoIKe2MpouURkWaGyUiHQsbRikklctR9SJQJtRdCBpYVA5zWuu6kKp1TW sESi5Ik2qkaaNXGBcJ/OK/mo/dd5iIdhkeRxpBHkBcugKxQTOAP1ppc38uwVL8Weh2dcc5OKPM6 7B780UqZ6/x2ECMnW3xAmw/t/J29ChiHbWDGluB60eAM6dwseFMu+SGfFevpKTbTeygTjCm4fwj d3RzOUzeuZ3qGcRnEY9WH4a6vSMsEVR9RZHWuF+0MDMw7wWCToKf4XyLAIxnz29kr+zYsAbGDaQ 7ZsHJ6wwvB8YvWUJ0Ew== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTE1MDM0MSBTYWx0ZWRfX5E5kUyuCL45C bK7wuSR79CcfzrowkT5UI3FaP8BdCNfy2D/fHi7VEx/N2QtvaTlzpUikRhc2O5xZlz+V/E7IhOB IQKwC2P6vC/8n1oDz3JyVJtiRKHP9v0= X-Proofpoint-GUID: MDFRsxEPcpDhkw81bb_kOQChlPs9zWrZ X-Authority-Analysis: v=2.4 cv=IcISymqa c=1 sm=1 tr=0 ts=6aa9d2ec cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=aNnz9XPx1a4JIXSYt2cE/A==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=Ikd4Dj_1AAAA:8 a=EUspDBNiAAAA:8 a=qr_CdHuHKQtOmQRTACQA:9 a=CjuIK1q_8ugA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-15_05,2026-09-15_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 priorityscore=1501 adultscore=0 bulkscore=0 clxscore=1015 malwarescore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609150341 On Tue, 15 Sep 2026 09:38:20 -0700 Nicolin Chen wrote: > The EVTQ, PRIQ and combined IRQ handlers are threaded and issue commands of > their own, e.g. a CMDQ_OP_PRI_RESP for a page request. Disabling the SMMU > while one is in flight hands that command to a queue consuming nothing, so > its poll waits out a full timeout. > > Two paths disable the SMMU while those IRQs are still requested: a failing > arm_smmu_device_reset() returns to a probe that disables the device itself, > and arm_smmu_disable_action() covers an unbind or any later probe failure. > Both can run after arm_smmu_setup_irqs() requested the IRQs. > > Disable those IRQs first in both paths, so that no handler is left running > once the SMMU goes down. arm_smmu_device_shutdown() needs no change of its > own here, since it already just calls arm_smmu_disable_action(). > > Also clear an IRQ number when its request fails or is skipped for a missing > ARM_SMMU_FEAT_PRI, keeping disable_irq() to the IRQs that this driver truly > owns. > > Note that the IOPF queue needs no such care of its own, as devres frees the > IRQs before running the release action of that queue, which came earlier in > arm_smmu_init_queues(). > > Assisted-by: LLM > Signed-off-by: Nicolin Chen I'm still not loving the disable_irq() in here just because to me it feels like it may end up masking stuff we ought to handle more carefully but I don't mind that much Reviewed-by: Jonathan Cameron