From: sashiko-bot@kernel.org
To: "Nicolin Chen" <nicolinc@nvidia.com>
Cc: linux-pci@vger.kernel.org
Subject: Re: [PATCH v5 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU
Date: Tue, 15 Sep 2026 16:48:05 +0000 [thread overview]
Message-ID: <20260915164806.1907F1F00898@smtp.kernel.org> (raw)
In-Reply-To: <0ca69e93a9370e4e172e4335104859648b8755c2.1789446520.git.nicolinc@nvidia.com>
> The EVTQ, PRIQ and combined IRQ handlers are threaded and issue commands of
> their own, e.g. a CMDQ_OP_PRI_RESP for a page request. Disabling the SMMU
> while one is in flight hands that command to a queue consuming nothing, so
> its poll waits out a full timeout.
>
> Two paths disable the SMMU while those IRQs are still requested: a failing
> arm_smmu_device_reset() returns to a probe that disables the device itself,
> and arm_smmu_disable_action() covers an unbind or any later probe failure.
> Both can run after arm_smmu_setup_irqs() requested the IRQs.
>
> Disable those IRQs first in both paths, so that no handler is left running
> once the SMMU goes down. arm_smmu_device_shutdown() needs no change of its
> own here, since it already just calls arm_smmu_disable_action().
>
> Also clear an IRQ number when its request fails or is skipped for a missing
> ARM_SMMU_FEAT_PRI, keeping disable_irq() to the IRQs that this driver truly
> owns.
>
> Note that the IOPF queue needs no such care of its own, as devres frees the
> IRQs before running the release action of that queue, which came earlier in
> arm_smmu_init_queues().
>
> Assisted-by: LLM
> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com>
Sashiko has reviewed this patch and found no issues. It looks great!
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1789446520.git.nicolinc@nvidia.com?part=8
next prev parent reply other threads:[~2026-09-15 16:48 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-15 16:38 [PATCH v5 00/15] iommu/arm-smmu-v3: Add PRI support Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 01/15] iommu/arm-smmu-v3: Disable the impl before disabling the SMMU on shutdown Nicolin Chen
2026-09-15 16:51 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 02/15] iommu/arm-smmu-v3: Add arm_smmu_attach_release() Nicolin Chen
2026-09-15 16:48 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 03/15] iommu/arm-smmu-v3: Add Q_POS() macro Nicolin Chen
2026-09-15 16:42 ` sashiko-bot
2026-09-15 23:19 ` Jonathan Cameron
2026-09-15 16:38 ` [PATCH v5 04/15] iommu/arm-smmu-v3: Drain in-flight fault events on domain detach Nicolin Chen
2026-09-15 16:51 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-23 22:33 ` Nicolin Chen
2026-09-23 23:39 ` Jason Gunthorpe
2026-09-24 1:42 ` Nicolin Chen
2026-09-24 14:03 ` Jason Gunthorpe
2026-09-28 22:29 ` Nicolin Chen
2026-09-29 19:46 ` Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 05/15] iommu/arm-smmu-v3: Flush in-flight fault work " Nicolin Chen
2026-09-15 16:57 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 06/15] iommu/arm-smmu-v3: Allocate IOPF queue without FEAT_SVA Nicolin Chen
2026-09-15 16:47 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 07/15] iommu/arm-smmu-v3: Submit CMDQ_OP_PRI_RESP for IOPF event Nicolin Chen
2026-09-15 17:02 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 08/15] iommu/arm-smmu-v3: Disable the queue IRQs before disabling the SMMU Nicolin Chen
2026-09-15 16:48 ` sashiko-bot [this message]
2026-09-15 23:21 ` Jonathan Cameron
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-24 1:12 ` Nicolin Chen
2026-09-15 16:38 ` [PATCH v5 09/15] iommu/arm-smmu-v3: Disable PRI when no IRQ handler is registered Nicolin Chen
2026-09-15 16:53 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 10/15] iommu/arm-smmu-v3: Support PRI Page Request in arm_smmu_handle_ppr() Nicolin Chen
2026-09-15 16:52 ` sashiko-bot
2026-09-15 23:22 ` Jonathan Cameron
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 11/15] iommu/arm-smmu-v3: Discard partial PRI faults on PRIQ overflow Nicolin Chen
2026-09-15 16:57 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 12/15] iommu/arm-smmu-v3: Allocate IOPF queue for ARM_SMMU_FEAT_PRI Nicolin Chen
2026-09-15 16:56 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 13/15] PCI/ATS: Add PRI stubs Nicolin Chen
2026-09-15 16:51 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 14/15] PCI/ATS: Export pci_enable_pri() and pci_reset_pri() Nicolin Chen
2026-09-15 16:49 ` sashiko-bot
2026-09-23 18:37 ` Jason Gunthorpe
2026-09-15 16:38 ` [PATCH v5 15/15] iommu/arm-smmu-v3: Enable PRI for PCI device in arm_smmu_probe_device() Nicolin Chen
2026-09-15 16:59 ` sashiko-bot
2026-10-04 16:50 ` [PATCH v5 00/15] iommu/arm-smmu-v3: Add PRI support Will Deacon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260915164806.1907F1F00898@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=nicolinc@nvidia.com \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox