From: Szymon Durawa <szymon.durawa@linux.intel.com>
To: helgaas@kernel.org, nirmal.patel@linux.intel.com,
szymon.durawa@linux.intel.com, djbw@kernel.org,
linux-pci@vger.kernel.org, lukas@wunner.de
Cc: Bjorn Helgaas <bhelgaas@google.com>
Subject: [PATCH v8 0/8] VMD add second root bus support
Date: Mon, 21 Sep 2026 16:43:06 +0000 [thread overview]
Message-ID: <20260921164316.3860312-1-szymon.durawa@linux.intel.com> (raw)
This series adds support for a second VMD root bus.
Today the VMD driver can enumerate and manage devices only behind the
first VMD root bus. Starting with Intel Arrow Lake, VMD may expose a
second root bus (BUS1), and devices behind that bus are not discovered
by the current driver.
The hardware model for Intel Arrow Lake VMD is slightly different
from earlier VMD generations:
- CFGBAR, MEMBAR1, and MEMBAR2 are shared by both VMD root buses.
- BUS1 uses a fixed primary bus number in hardware.
- Interrupt handling remains based on the existing VMD MSI/MSI-X and
irq_domain model; this series does not introduce a separate interrupt
domain for BUS1.
To support that layout, the series first refactors the current code so
resource setup, bus creation, and enumeration are split into helpers.
It then partitions the shared CFGBAR/MEMBAR apertures between BUS0 and
BUS1, creates a second root bus, and adds a VMD-specific workaround for
the fixed BUS1 primary bus number so PCI core bridge scanning does not
reassign BUS1 and lose subordinate device discovery.
Patch overview:
- Patches 1-4 extract helper functions for bus enumeration, CFGBAR and
MEMBAR configuration, and root-bus creation.
- Patch 5 replaces hardcoded resource indices and constants with enums
and defines.
- Patch 6 converts single-bus state into per-root-bus arrays.
- Patch 7 adds BUS1 resource partitioning and second-root-bus support.
- Patch 8 keeps the BUS1 root bus number aligned with the hardware-fixed
primary bus number so PCI core bridge scanning does not reconfigure it
and lose BUS1 subordinate enumeration.
Tested on an Arrow Lake platform with NVMe devices present behind both
VMD root buses. With the series applied, devices behind BUS0 and BUS1
are enumerated and become visible to the kernel. Without patch 8,
devices behind BUS1 are not discovered.
Changes from v1:
- splitting series into more commits, requested by Bjorn
- adding helper functions, suggested by Bjorn
- minor typos and unclear wording updated, suggested by Bjorn
Changes from v2:
- wording update in commit logs, suggested by Bjorn
Changes from v3:
- using GENMASK() instead of manual bits shifting, suggested by Bjorn
- converting decimal number to hex representation, suggested by Bjorn
- wording update in commit logs, suggested by Bjorn
Changes from v4:
- Update Dan's email address
- Resending the whole series to the correct mailing list
Changes from v5:
- Fixed correctness issues in BUS/resource layout in patches 7 and 8
- Fixed lifetime and use-after-free issues in patches 3 and 7
- Fixed resource tree integrity issues in patch 7
- Fixed error-path leaks across patches 3, 4, and 5
- Fixed allocation failure handling in patch 3
- Note on Sashiko feedback: Pre-existing warnings (unrelated to
this feature series) were left untouched.
Changes from v6:
- Refactoring the series to align with recent changes in link below:
https://patchwork.kernel.org/project/linux-pci/patch/20260629165025.268836-1-nirmal.patel@linux.intel.com/
- Fixed double free of the IRQ domain and emulated domain number
- Fixed a race with concurrent readers when modifying sibling pointers
- Fixed the MEMBAR2 split equations in
vmd_configure_membar1_membar2()
- Fixed hardcoded resource indices in vmd_configure_membar()
Changes from v7:
- wording update in commit logs in patch 8, suggested by Bjorn
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Dan Williams <djbw@kernel.org>
Cc: Lukas Wunner <lukas@wunner.de>
Cc: linux-pci@vger.kernel.org
Suggested-by: Nirmal Patel <nirmal.patel@linux.intel.com>
Signed-off-by: Szymon Durawa <szymon.durawa@linux.intel.com>
Szymon Durawa (8):
PCI: vmd: Add vmd_bus_enumeration() helper function
PCI: vmd: Add vmd_configure_cfgbar() helper function
PCI: vmd: Add vmd_configure_membar() and
vmd_configure_membar1_membar2()
PCI: vmd: Add vmd_create_bus()
PCI: vmd: Replace hardcoded values with enum and defines
PCI: vmd: Convert bus and busn_start to an array
PCI: vmd: Add support for second rootbus under VMD
PCI: vmd: Workaround for hardwired BUS1 bus number
drivers/pci/controller/vmd.c | 633 ++++++++++++++++++++++++++++-------
1 file changed, 510 insertions(+), 123 deletions(-)
--
2.43.0
next reply other threads:[~2026-09-21 14:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-21 16:43 Szymon Durawa [this message]
2026-09-21 16:43 ` [PATCH v8 1/8] PCI: vmd: Add vmd_bus_enumeration() helper function Szymon Durawa
2026-09-21 14:25 ` sashiko-bot
2026-09-21 16:43 ` [PATCH v8 2/8] PCI: vmd: Add vmd_configure_cfgbar() " Szymon Durawa
2026-09-21 14:21 ` sashiko-bot
2026-09-21 16:43 ` [PATCH v8 3/8] PCI: vmd: Add vmd_configure_membar() and vmd_configure_membar1_membar2() Szymon Durawa
2026-09-21 14:25 ` sashiko-bot
2026-09-21 16:43 ` [PATCH v8 4/8] PCI: vmd: Add vmd_create_bus() Szymon Durawa
2026-09-21 14:27 ` sashiko-bot
2026-09-21 16:43 ` [PATCH v8 5/8] PCI: vmd: Replace hardcoded values with enum and defines Szymon Durawa
2026-09-21 14:26 ` sashiko-bot
2026-09-21 16:43 ` [PATCH v8 6/8] PCI: vmd: Convert bus and busn_start to an array Szymon Durawa
2026-09-21 14:26 ` sashiko-bot
2026-09-21 16:43 ` [PATCH v8 7/8] PCI: vmd: Add support for second rootbus under VMD Szymon Durawa
2026-09-21 14:32 ` sashiko-bot
2026-09-21 16:43 ` [PATCH v8 8/8] PCI: vmd: Workaround for hardwired BUS1 bus number Szymon Durawa
2026-09-21 14:34 ` sashiko-bot
2026-09-22 15:49 ` [PATCH v8 0/8] VMD add second root bus support Manivannan Sadhasivam
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