Re: [PATCH] PCI: mediatek: Fix integer truncation in fls() for resource size

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] PCI: mediatek: incomplete fix for 4GiB resource size due to macro mask
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commit 790d994ea56f0eba397f9698ea9390e70f3a8d1c
Author: Sreeraj S Kurup <sreekuttan2156239@gmail.com>

PCI: mediatek: Fix integer truncation in fls() for resource size

This commit replaces fls() with fls64() when calculating the AHB-to-PCIe
translation window size to properly handle 64-bit memory resources.

> diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
> --- a/drivers/pci/controller/pcie-mediatek.c
> +++ b/drivers/pci/controller/pcie-mediatek.c
[ ... ]
> @@ -754,7 +755,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
>  
>  	/* Set AHB to PCIe translation windows */
>  	val = lower_32_bits(mem->start) |
> -	      AHB2PCIE_SIZE(fls(resource_size(mem)));
> +	      AHB2PCIE_SIZE(fls64(resource_size(mem)));

[Severity: High]
Will this still result in a truncated window size when using a 4 GiB resource?

Looking at the macro definition in drivers/pci/controller/pcie-mediatek.c:

#define AHB2PCIE_SIZE(x)    ((x) & GENMASK(4, 0))

For a 4 GiB memory resource, fls64() returns 33. The 5-bit mask in 
AHB2PCIE_SIZE() restricts values to 0-31, which truncates 33 down to 1.
Could this result in an incorrect window size being programmed, causing memory
accesses across the bridge to fail?

>  	writel(val, port->base + PCIE_AHB_TRANS_BASE0_L);
>  
>  	val = upper_32_bits(mem->start);
[ ... ]
> @@ -830,7 +831,7 @@ static int mtk_pcie_startup_port_en7528(struct mtk_pcie_port *port)
>  
>  	/* Set AHB to PCIe translation windows */
>  	val = lower_32_bits(mem->start) |
> -	      AHB2PCIE_SIZE(fls(resource_size(mem)));
> +	      AHB2PCIE_SIZE(fls64(resource_size(mem)));

[Severity: High]
Is this instance in mtk_pcie_startup_port_en7528() affected by the same
truncation issue through the AHB2PCIE_SIZE() macro?

>  	writel(val, port->base + PCIE_AHB_TRANS_BASE0_L);
>  
>  	val = upper_32_bits(mem->start);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260930094912.3069-1-sreekuttan2156239@gmail.com?part=1