Linux PCI subsystem development
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From: Bjorn Helgaas <helgaas@kernel.org>
To: Jose Ignacio Tornos Martinez <jtornosm@redhat.com>
Cc: bhelgaas@google.com, alex@shazbot.org, jjohnson@kernel.org,
	johannes@sipsolutions.net, mani@kernel.org, jgg@ziepe.ca,
	yishaih@nvidia.com, skolothumtho@nvidia.com,
	kevin.tian@intel.com, linux-pci@vger.kernel.org,
	kvm@vger.kernel.org, linux-wireless@vger.kernel.org,
	ath11k@lists.infradead.org, ath12k@lists.infradead.org,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 4/7] ath11k: add PCIe link recovery retry
Date: Wed, 14 Oct 2026 11:58:29 -0500	[thread overview]
Message-ID: <20261014165829.GA1636877@bhelgaas> (raw)
In-Reply-To: <20260930140833.576941-5-jtornosm@redhat.com>

On Wed, Sep 30, 2026 at 04:08:30PM +0200, Jose Ignacio Tornos Martinez wrote:
> When ath11k devices are passed through to VMs via PCIe passthrough,
> the PCIe link may not stabilize immediately after global reset due to
> virtualization layer timing variations. This causes MHI initialization
> to fail with "BHI offset: 0xffffffff is out of range" errors because
> the device is read before it's ready.
> 
> Currently, ath11k_pci_soc_global_reset() just warns if the link is
> down but continues anyway, leading to inevitable MHI failures.
> 
> This patch adds:
> 1. A retry loop (up to 5000ms) to wait for the PCIe link to recover
>    after global reset (similar to the existing ath12k LTSSM retry logic)
> 2. Proper error propagation to prevent continuing with a dead link
> 
> This is especially important for VM environments where timing can vary
> significantly from bare metal.
> 
> Signed-off-by: Jose Ignacio Tornos Martinez <jtornosm@redhat.com>
> ---
>  drivers/net/wireless/ath/ath11k/pci.c | 39 ++++++++++++++++++++++-----
>  1 file changed, 32 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/wireless/ath/ath11k/pci.c b/drivers/net/wireless/ath/ath11k/pci.c
> index 7114eca8810d..4fc6aaf036c1 100644
> --- a/drivers/net/wireless/ath/ath11k/pci.c
> +++ b/drivers/net/wireless/ath/ath11k/pci.c
> @@ -190,8 +190,10 @@ static void ath11k_pci_restore_window(struct ath11k_base *ab)
>  	spin_unlock_bh(&ab_pci->window_lock);
>  }
>  
> -static void ath11k_pci_soc_global_reset(struct ath11k_base *ab)
> +static int ath11k_pci_soc_global_reset(struct ath11k_base *ab)
>  {
> +	unsigned long timeout;
> +	bool link_recovered = false;
>  	u32 val, delay;
>  
>  	val = ath11k_pcic_read32(ab, PCIE_SOC_GLOBAL_RESET);
> @@ -211,14 +213,29 @@ static void ath11k_pci_soc_global_reset(struct ath11k_base *ab)
>  
>  	mdelay(delay);
>  
> -	val = ath11k_pcic_read32(ab, PCIE_SOC_GLOBAL_RESET);
> -	if (val == 0xffffffff)
> -		ath11k_warn(ab, "link down error during global reset\n");
> +	/* Wait for PCIe link to recover, especially important in VM environments
> +	 * where timing can vary significantly from bare metal.
> +	 */
> +	timeout = jiffies + msecs_to_jiffies(5000);
> +	while (time_before(jiffies, timeout)) {
> +		val = ath11k_pcic_read32(ab, PCIE_SOC_GLOBAL_RESET);
> +		if (val != 0xffffffff) {
> +			link_recovered = true;
> +			break;
> +		}
> +		mdelay(20);
> +	}
> +	if (!link_recovered) {
> +		ath11k_err(ab, "PCIe link failed to recover - device may need power cycle\n");
> +		return -ETIMEDOUT;
> +	}

Link down is a PCIe reset of the endpoint, which should clear all
PCIe-specific state, e.g., BAR values.  Is that restored somewhere?

>  	/* Restore window register as its content is cleared during
>  	 * hardware global reset, such that it aligns with host cache.
>  	 */
>  	ath11k_pci_restore_window(ab);
> +
> +	return 0;
>  }
>  
>  static void ath11k_pci_clear_dbg_registers(struct ath11k_base *ab)
> @@ -373,8 +390,10 @@ static void ath11k_pci_force_wake(struct ath11k_base *ab)
>  	mdelay(5);
>  }
>  
> -static void ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on)
> +static int ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on)
>  {
> +	int ret;
> +
>  	mdelay(100);
>  
>  	if (power_on) {
> @@ -387,8 +406,12 @@ static void ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on)
>  
>  	ath11k_mhi_clear_vector(ab);
>  	ath11k_pci_clear_dbg_registers(ab);
> -	ath11k_pci_soc_global_reset(ab);
> +	ret = ath11k_pci_soc_global_reset(ab);
> +	if (ret)
> +		return ret;
>  	ath11k_mhi_set_mhictrl_reset(ab);
> +
> +	return 0;
>  }
>  
>  static void ath11k_pci_init_qmi_ce_config(struct ath11k_base *ab)
> @@ -818,7 +841,9 @@ static int ath11k_pci_power_up(struct ath11k_base *ab)
>  
>  	ab_pci->register_window = 0;
>  	clear_bit(ATH11K_FLAG_DEVICE_INIT_DONE, &ab->dev_flags);
> -	ath11k_pci_sw_reset(ab_pci->ab, true);
> +	ret = ath11k_pci_sw_reset(ab_pci->ab, true);
> +	if (ret)
> +		return ret;
>  
>  	/* Disable ASPM during firmware download due to problems switching
>  	 * to AMSS state.
> -- 
> 2.53.0
> 

  parent reply	other threads:[~2026-10-14 16:58 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-30 14:08 [PATCH 0/7] Enable Qualcomm WiFi PCIe passthrough to VMs Jose Ignacio Tornos Martinez
2026-09-30 14:08 ` [PATCH 1/7] PCI: Add pci_find_free_ext_cap_offset() helper Jose Ignacio Tornos Martinez
2026-09-30 14:21   ` sashiko-bot
2026-10-11  7:16     ` Jose Ignacio Tornos Martinez
2026-09-30 14:08 ` [PATCH 2/7] vfio: Add qcom_vfio.h header for MSI cache protocol Jose Ignacio Tornos Martinez
2026-09-30 14:31   ` sashiko-bot
2026-10-11  7:17     ` Jose Ignacio Tornos Martinez
2026-09-30 14:08 ` [PATCH 3/7] vfio/pci: Add qcom-vfio-pci variant driver Jose Ignacio Tornos Martinez
2026-09-30 14:45   ` sashiko-bot
2026-10-11  7:32     ` Jose Ignacio Tornos Martinez
2026-09-30 15:12   ` Jason Gunthorpe
2026-10-01  7:19     ` Jose Ignacio Tornos Martinez
2026-10-02 17:10       ` Jason Gunthorpe
2026-10-05 11:01         ` Jose Ignacio Tornos Martinez
2026-09-30 14:08 ` [PATCH 4/7] ath11k: add PCIe link recovery retry Jose Ignacio Tornos Martinez
2026-09-30 14:56   ` sashiko-bot
2026-10-11  7:35     ` Jose Ignacio Tornos Martinez
2026-10-14 16:58   ` Bjorn Helgaas [this message]
2026-10-15  6:57     ` Jose Ignacio Tornos Martinez
2026-09-30 14:08 ` [PATCH 5/7] ath11k: Use VFIO MSI cache when available Jose Ignacio Tornos Martinez
2026-09-30 15:08   ` sashiko-bot
2026-10-11  7:36     ` Jose Ignacio Tornos Martinez
2026-09-30 14:08 ` [PATCH 6/7] ath12k: add PCIe link recovery retry Jose Ignacio Tornos Martinez
2026-09-30 15:17   ` sashiko-bot
2026-10-11  7:39     ` Jose Ignacio Tornos Martinez
2026-09-30 14:08 ` [PATCH 7/7] ath12k: Use VFIO MSI cache when available Jose Ignacio Tornos Martinez
2026-09-30 15:29   ` sashiko-bot
2026-10-11  7:41     ` Jose Ignacio Tornos Martinez
2026-10-11  7:54 ` [PATCH 0/7] Enable Qualcomm WiFi PCIe passthrough to VMs Jose Ignacio Tornos Martinez
2026-10-11 13:25   ` Jason Gunthorpe
2026-10-13 13:43     ` Jose Ignacio Tornos Martinez
2026-10-13 14:03       ` Jason Gunthorpe
2026-10-13 15:42         ` Jose Ignacio Tornos Martinez
2026-10-14 15:00           ` Jason Gunthorpe
2026-10-14 20:46             ` Michael Kelley
2026-10-15  0:06               ` Jason Gunthorpe
2026-10-15  7:09             ` Jose Ignacio Tornos Martinez

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