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Sat, 24 Oct 2026 21:01:53 -0700 (PDT) Received: from at-Standard-PC-Q35-ICH9-2009 ([106.221.76.40]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-198a32ff780sm11635283c88.22.2026.10.24.21.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 24 Oct 2026 21:01:53 -0700 (PDT) From: Atharva Tiwari To: Cc: Atharva Tiwari , Bjorn Helgaas , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org (maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)), "H. Peter Anvin" , Alex Deucher , =?UTF-8?q?Christian=20K=C3=B6nig?= , David Airlie , Simona Vetter , Harry Wentland , Leo Li , Rodrigo Siqueira , Kenneth Feng , Hans de Goede , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , Andre Eikmeyer , linux-pci@vger.kernel.org (open list:PCI SUBSYSTEM), linux-kernel@vger.kernel.org (open list:X86 ARCHITECTURE (32-BIT AND 64-BIT)), amd-gfx@lists.freedesktop.org (open list:RADEON and AMDGPU DRM DRIVERS), dri-devel@lists.freedesktop.org (open list:DRM DRIVERS), platform-driver-x86@vger.kernel.org (open list:X86 PLATFORM DRIVERS) Subject: [PATCH 02/13] PCI: Disable pcie port and access on D3 on specific amd devices Date: Sat, 24 Oct 2026 23:59:38 -0400 Message-ID: <20261025040046.1602-3-atharvatiwarilinuxdev@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261025040046.1602-1-atharvatiwarilinuxdev@gmail.com> References: <20261025040046.1602-1-atharvatiwarilinuxdev@gmail.com> X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Transfer-Encoding: 8bit As mentioned in the previous commit, PWRD turns off the entire bridge, and if we read/write anything to the config space or the PCIE space when the bridge is dead, the CPU CATERR's, so to avoid interaction when the bridge is dead, we remove pcieport support for the bridges, and we restrict access to those bridges when the bridge is dead. Signed-off-by: Atharva Tiwari --- arch/x86/pci/fixup.c | 30 ++++++++++++++++++++++++++++++ drivers/pci/access.c | 18 ++++++++++++++++++ drivers/pci/pcie/portdrv.c | 2 +- include/linux/pci.h | 7 +++++++ 4 files changed, 56 insertions(+), 1 deletion(-) diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index 795d81c7a..66829941e 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -1094,6 +1094,35 @@ static void asus_disable_nvme_d3cold(struct pci_dev *pdev) } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x9a09, asus_disable_nvme_d3cold); +static const struct dmi_system_id quirk_disable_pcie_port_dmi_table[] = { + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro16,1"), + }, + }, + { + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro16,4"), + }, + }, + {} +}; + +static void quirk_disable_pcie_port(struct pci_dev *pdev) +{ + struct pci_dev *upstream = pdev; + + if (dmi_check_system(quirk_disable_pcie_port_dmi_table)) { + while ((upstream = pci_upstream_bridge(upstream))) { + upstream->no_pcie_port = 1; + upstream->ignore_access_d3 = 1; + } + } +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, 0x7340, quirk_disable_pcie_port); + #ifdef CONFIG_SUSPEND /* * Root Ports on some AMD SoCs advertise PME_Support for D3hot and D3cold, but @@ -1179,4 +1208,5 @@ static void quirk_tuxeo_rp_d3(struct pci_dev *pdev) } } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, 0x1502, quirk_tuxeo_rp_d3); + #endif /* CONFIG_SUSPEND */ diff --git a/drivers/pci/access.c b/drivers/pci/access.c index b123da16b..5e9513067 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c @@ -559,6 +559,9 @@ EXPORT_SYMBOL(pcie_capability_clear_and_set_dword); int pci_read_config_byte(const struct pci_dev *dev, int where, u8 *val) { + if (pci_dev_ignore_access(dev)) + return PCIBIOS_SUCCESSFUL; + if (pci_dev_is_disconnected(dev)) { PCI_SET_ERROR_RESPONSE(val); return PCIBIOS_DEVICE_NOT_FOUND; @@ -569,6 +572,9 @@ EXPORT_SYMBOL(pci_read_config_byte); int pci_read_config_word(const struct pci_dev *dev, int where, u16 *val) { + if (pci_dev_ignore_access(dev)) + return PCIBIOS_SUCCESSFUL; + if (pci_dev_is_disconnected(dev)) { PCI_SET_ERROR_RESPONSE(val); return PCIBIOS_DEVICE_NOT_FOUND; @@ -580,6 +586,9 @@ EXPORT_SYMBOL(pci_read_config_word); int pci_read_config_dword(const struct pci_dev *dev, int where, u32 *val) { + if (pci_dev_ignore_access(dev)) + return PCIBIOS_SUCCESSFUL; + if (pci_dev_is_disconnected(dev)) { PCI_SET_ERROR_RESPONSE(val); return PCIBIOS_DEVICE_NOT_FOUND; @@ -590,6 +599,9 @@ EXPORT_SYMBOL(pci_read_config_dword); int pci_write_config_byte(const struct pci_dev *dev, int where, u8 val) { + if (pci_dev_ignore_access(dev)) + return PCIBIOS_SUCCESSFUL; + if (pci_dev_is_disconnected(dev)) return PCIBIOS_DEVICE_NOT_FOUND; return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); @@ -598,6 +610,9 @@ EXPORT_SYMBOL(pci_write_config_byte); int pci_write_config_word(const struct pci_dev *dev, int where, u16 val) { + if (pci_dev_ignore_access(dev)) + return PCIBIOS_SUCCESSFUL; + if (pci_dev_is_disconnected(dev)) return PCIBIOS_DEVICE_NOT_FOUND; return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); @@ -607,6 +622,9 @@ EXPORT_SYMBOL(pci_write_config_word); int pci_write_config_dword(const struct pci_dev *dev, int where, u32 val) { + if (pci_dev_ignore_access(dev)) + return PCIBIOS_SUCCESSFUL; + if (pci_dev_is_disconnected(dev)) return PCIBIOS_DEVICE_NOT_FOUND; return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); diff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c index a9cbfc1d2..d2f19e566 100644 --- a/drivers/pci/pcie/portdrv.c +++ b/drivers/pci/pcie/portdrv.c @@ -688,7 +688,7 @@ static int pcie_portdrv_probe(struct pci_dev *dev, int type = pci_pcie_type(dev); int status; - if (!pci_is_pcie(dev) || + if (!pci_is_pcie(dev) || dev->no_pcie_port || ((type != PCI_EXP_TYPE_ROOT_PORT) && (type != PCI_EXP_TYPE_UPSTREAM) && (type != PCI_EXP_TYPE_DOWNSTREAM) && diff --git a/include/linux/pci.h b/include/linux/pci.h index d31a8d107..8835b1c82 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -420,6 +420,8 @@ struct pci_dev { unsigned int no_d1d2:1; /* D1 and D2 are forbidden */ unsigned int no_d3cold:1; /* D3cold is forbidden */ unsigned int bridge_d3:1; /* Allow D3 for bridge */ + unsigned int no_pcie_port:1; /* PCIE Port driver is forbidden */ + unsigned int ignore_access_d3:1; /* Ignore access when device is in D3Cold */ unsigned int d3cold_allowed:1; /* D3cold is allowed by user */ unsigned int mmio_always_on:1; /* Disallow turning off io/mem decoding during BAR sizing */ @@ -2747,6 +2749,11 @@ static inline bool pci_dev_is_disconnected(const struct pci_dev *dev) return READ_ONCE(dev->error_state) == pci_channel_io_perm_failure; } +static inline bool pci_dev_ignore_access(const struct pci_dev *dev) +{ + return dev->ignore_access_d3 && dev->current_state == PCI_D3cold; +} + void pci_request_acs(void); bool pci_acs_enabled(struct pci_dev *pdev, u16 acs_flags); bool pci_acs_path_enabled(struct pci_dev *start, -- 2.55.0